2 * $Id: sh4mmio.c,v 1.9 2006-06-18 12:01:53 nkeynes Exp $
4 * Miscellaneous and not-really-implemented SH4 peripheral modules. Also
5 * responsible for including the IMPL side of the SH4 MMIO pages.
6 * Most of these will eventually be split off into their own files.
8 * Copyright (c) 2005 Nathan Keynes.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 #define MODULE sh4_module
30 /********************************* MMU *************************************/
32 MMIO_REGION_READ_DEFFN( MMU )
34 #define OCRAM_START (0x1C000000>>PAGE_BITS)
35 #define OCRAM_END (0x20000000>>PAGE_BITS)
37 static char *cache = NULL;
39 void mmio_region_MMU_write( uint32_t reg, uint32_t val )
43 mmu_set_cache_mode( val & (CCR_OIX|CCR_ORA) );
48 MMIO_WRITE( MMU, reg, val );
54 cache = mem_alloc_pages(2);
57 void mmu_set_cache_mode( int mode )
61 case MEM_OC_INDEX0: /* OIX=0 */
62 for( i=OCRAM_START; i<OCRAM_END; i++ )
63 page_map[i] = cache + ((i&0x02)<<(PAGE_BITS-1));
65 case MEM_OC_INDEX1: /* OIX=1 */
66 for( i=OCRAM_START; i<OCRAM_END; i++ )
67 page_map[i] = cache + ((i&0x02000000)>>(25-PAGE_BITS));
69 default: /* disabled */
70 for( i=OCRAM_START; i<OCRAM_END; i++ )
77 /********************************* BSC *************************************/
79 uint16_t bsc_output_mask_lo = 0, bsc_output_mask_hi = 0;
80 uint16_t bsc_input_mask_lo = 0, bsc_input_mask_hi = 0;
81 uint32_t bsc_output = 0, bsc_input = 0x0300;
83 void bsc_out( int output, int mask )
85 /* Go figure... The BIOS won't start without this mess though */
86 if( ((output | (~mask)) & 0x03) == 3 ) {
93 void mmio_region_BSC_write( uint32_t reg, uint32_t val )
98 bsc_input_mask_lo = bsc_output_mask_lo = 0;
99 for( i=0; i<16; i++ ) {
100 int bits = (val >> (i<<1)) & 0x03;
101 if( bits == 2 ) bsc_input_mask_lo |= (1<<i);
102 else if( bits != 0 ) bsc_output_mask_lo |= (1<<i);
104 bsc_output = (bsc_output&0x000F0000) |
105 (MMIO_READ( BSC, PDTRA ) & bsc_output_mask_lo);
106 bsc_out( MMIO_READ( BSC, PDTRA ) | ((MMIO_READ(BSC,PDTRB)<<16)),
107 bsc_output_mask_lo | (bsc_output_mask_hi<<16) );
110 bsc_input_mask_hi = bsc_output_mask_hi = 0;
111 for( i=0; i<4; i++ ) {
112 int bits = (val >> (i>>1)) & 0x03;
113 if( bits == 2 ) bsc_input_mask_hi |= (1<<i);
114 else if( bits != 0 ) bsc_output_mask_hi |= (1<<i);
116 bsc_output = (bsc_output&0xFFFF) |
117 ((MMIO_READ( BSC, PDTRA ) & bsc_output_mask_hi)<<16);
120 bsc_output = (bsc_output&0x000F0000) |
121 (val & bsc_output_mask_lo );
122 bsc_out( val | ((MMIO_READ(BSC,PDTRB)<<16)),
123 bsc_output_mask_lo | (bsc_output_mask_hi<<16) );
126 bsc_output = (bsc_output&0xFFFF) |
127 ( (val & bsc_output_mask_hi)<<16 );
130 WARN( "Write to (mostly) unimplemented BSC (%03X <= %08X) [%s: %s]",
131 reg, val, MMIO_REGID(BSC,reg), MMIO_REGDESC(BSC,reg) );
132 MMIO_WRITE( BSC, reg, val );
135 int32_t mmio_region_BSC_read( uint32_t reg )
140 val = (bsc_input & bsc_input_mask_lo) | (bsc_output&0xFFFF);
143 val = ((bsc_input>>16) & bsc_input_mask_hi) | (bsc_output>>16);
146 val = MMIO_READ( BSC, reg );
148 WARN( "Read from (mostly) unimplemented BSC (%03X => %08X) [%s: %s]",
149 reg, val, MMIO_REGID(BSC,reg), MMIO_REGDESC(BSC,reg) );
153 /********************************* UBC *************************************/
155 MMIO_REGION_STUBFNS( UBC )
158 /********************************** SCI *************************************/
160 MMIO_REGION_STUBFNS( SCI )
.