lxdream 0.9.1| filename | src/sh4/sh4mmio.c |
| changeset | 929:fd8cb0c82f5f |
| prev | 830:73637b9624e4 |
| next | 975:007bf7eb944f |
| author | nkeynes |
| date | Sat Dec 27 02:59:35 2008 +0000 (15 years ago) |
| branch | lxdream-mem |
| permissions | -rw-r--r-- |
| last change | Replace fpscr_mask/fpscr flags in xlat_cache_block with a single xlat_sh4_mode, which tracks the field of the same name in sh4r - actually a little faster this way. Now depends on SR.MD, FPSCR.PR and FPSCR.SZ (although it doesn't benefit from the SR flag yet). Also fixed the failure to check the flags in the common case (code address returned by previous block) which took away the performance benefits, but oh well. |
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1 /**
2 * $Id$
3 *
4 * Miscellaneous and not-really-implemented SH4 peripheral modules. Also
5 * responsible for including the IMPL side of the SH4 MMIO pages.
6 * Most of these will eventually be split off into their own files.
7 *
8 * Copyright (c) 2005 Nathan Keynes.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20 #define MODULE sh4_module
22 #include "dream.h"
23 #include "dreamcast.h"
24 #include "mem.h"
25 #include "clock.h"
26 #include "sh4/sh4core.h"
27 #include "sh4/sh4mmio.h"
28 #define MMIO_IMPL
29 #include "sh4/sh4mmio.h"
31 /********************************* BSC *************************************/
33 uint32_t bsc_input = 0x0300;
35 uint16_t bsc_read_pdtra()
36 {
37 int i;
38 uint32_t pctra = MMIO_READ( BSC, PCTRA );
39 uint16_t output = MMIO_READ( BSC, PDTRA );
40 uint16_t input_mask = 0, output_mask = 0;
41 for( i=0; i<16; i++ ) {
42 int bits = (pctra >> (i<<1)) & 0x03;
43 if( bits == 2 ) input_mask |= (1<<i);
44 else if( bits != 0 ) output_mask |= (1<<i);
45 }
47 /* ??? */
48 if( ((output | (~output_mask)) & 0x03) == 3 ) {
49 output |= 0x03;
50 } else {
51 output &= ~0x03;
52 }
54 return (bsc_input & input_mask) | output;
55 }
57 uint32_t bsc_read_pdtrb()
58 {
59 int i;
60 uint32_t pctrb = MMIO_READ( BSC, PCTRB );
61 uint16_t output = MMIO_READ( BSC, PDTRB );
62 uint16_t input_mask = 0, output_mask = 0;
63 for( i=0; i<4; i++ ) {
64 int bits = (pctrb >> (i<<1)) & 0x03;
65 if( bits == 2 ) input_mask |= (1<<i);
66 else if( bits != 0 ) output_mask |= (1<<i);
67 }
69 return ((bsc_input>>16) & input_mask) | output;
71 }
73 MMIO_REGION_WRITE_DEFFN(BSC)
75 MMIO_REGION_READ_FN( BSC, reg )
76 {
77 int32_t val;
78 reg &= 0xFFF;
79 switch( reg ) {
80 case PDTRA:
81 val = bsc_read_pdtra();
82 break;
83 case PDTRB:
84 val = bsc_read_pdtrb();
85 break;
86 default:
87 val = MMIO_READ( BSC, reg );
88 }
89 return val;
90 }
92 /********************************* UBC *************************************/
94 MMIO_REGION_READ_FN( UBC, reg )
95 {
96 return MMIO_READ( UBC, reg & 0xFFF );
97 }
99 MMIO_REGION_WRITE_FN( UBC, reg, val )
100 {
101 reg &= 0xFFF;
102 switch( reg ) {
103 case BAMRA:
104 case BAMRB:
105 val &= 0x0F;
106 break;
107 case BBRA:
108 case BBRB:
109 val &= 0x07F;
110 if( val != 0 ) {
111 WARN( "UBC not implemented" );
112 }
113 break;
114 case BRCR:
115 val &= 0xC4C9;
116 break;
117 }
118 MMIO_WRITE( UBC, reg, val );
119 }
122 /********************************** SCI *************************************/
124 MMIO_REGION_STUBFNS( SCI )
.