filename | test/timer.c |
changeset | 731:ee2e929cca3a |
prev | 272:fb6be85235e8 |
author | nkeynes |
date | Fri Jan 28 16:14:57 2011 +1000 (13 years ago) |
permissions | -rw-r--r-- |
last change | Perform the sanity checks for FBOs and shaders up front rather than on every use, and remove surplus glGetError() calls |
view | annotate | diff | log | raw |
1 #include "lib.h"
2 #define TMU_CHANNEL 2
3 #define BASE_TICKS_PER_US 200
4 #define CLOCK_DIVIDER 16
5 #define TOCR 0xFFD80000 /* Output control register */
6 #define TSTR 0xFFD80004 /* Start register */
7 #define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */
8 #define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */
9 #define TCR(c) (0xFFD80010 + (c*12)) /* Control register */
11 /**
12 * Initialize the on-chip timer controller. We snag TMU channel 2 in its
13 * highest resolution mode, and start it counting down from max_int.
14 */
15 void timer_init() {
16 unsigned int val = byte_read(TSTR);
17 byte_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */
18 long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );
19 long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );
20 word_write( TCR(TMU_CHANNEL), 0x00000000 );
21 }
23 void timer_run() {
24 byte_write( TSTR, byte_read(TSTR) | (1<<TMU_CHANNEL) );
25 }
27 void timer_start() {
28 timer_init();
29 timer_run();
30 }
32 /**
33 * Report the current value of TMU2.
34 */
35 unsigned int timer_gettime() {
36 return long_read(TCNT(TMU_CHANNEL));
37 }
39 /**
40 * Stop TMU2 and report the current value.
41 */
42 unsigned int timer_stop() {
43 long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) );
44 return long_read( TCNT(TMU_CHANNEL) );
45 }
48 /**
49 * Convert the supplied timer value to a number of micro seconds since the timer
50 * was started.
51 */
52 unsigned int timer_to_microsecs( unsigned int value ) {
53 return (0xFFFFFFFF - value) * CLOCK_DIVIDER / BASE_TICKS_PER_US;
54 }
56 unsigned int timer_gettime_us() {
57 return timer_to_microsecs( timer_gettime() );
58 }
.