nkeynes@31 | 1 | /**
|
nkeynes@138 | 2 | * $Id: ide.h,v 1.5 2006-04-30 01:51:08 nkeynes Exp $
|
nkeynes@2 | 3 | *
|
nkeynes@31 | 4 | * This file defines the interface and structures of the dreamcast's IDE
|
nkeynes@31 | 5 | * port. Note that the register definitions are in asic.h, as the registers
|
nkeynes@31 | 6 | * fall into the general ASIC ranges (and I don't want to use smaller pages
|
nkeynes@31 | 7 | * at this stage). The registers here are exactly as per the ATA
|
nkeynes@31 | 8 | * specifications, which makes things a little easier.
|
nkeynes@2 | 9 | *
|
nkeynes@31 | 10 | * Copyright (c) 2005 Nathan Keynes.
|
nkeynes@31 | 11 | *
|
nkeynes@31 | 12 | * This program is free software; you can redistribute it and/or modify
|
nkeynes@31 | 13 | * it under the terms of the GNU General Public License as published by
|
nkeynes@31 | 14 | * the Free Software Foundation; either version 2 of the License, or
|
nkeynes@31 | 15 | * (at your option) any later version.
|
nkeynes@31 | 16 | *
|
nkeynes@31 | 17 | * This program is distributed in the hope that it will be useful,
|
nkeynes@31 | 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
nkeynes@31 | 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
nkeynes@31 | 20 | * GNU General Public License for more details.
|
nkeynes@2 | 21 | */
|
nkeynes@31 | 22 |
|
nkeynes@2 | 23 | #ifndef dream_ide_H
|
nkeynes@2 | 24 | #define dream_ide_H 1
|
nkeynes@2 | 25 |
|
nkeynes@2 | 26 | #include "dream.h"
|
nkeynes@2 | 27 |
|
nkeynes@2 | 28 | struct ide_registers {
|
nkeynes@2 | 29 | uint8_t status; /* A05F709C + A05F7018 Read-only */
|
nkeynes@2 | 30 | uint8_t control; /* A05F7018 Write-only 01110 */
|
nkeynes@2 | 31 | uint8_t error; /* A05F7084 Read-only 10001 */
|
nkeynes@2 | 32 | uint8_t feature; /* A05F7084 Write-only 10001 */
|
nkeynes@2 | 33 | uint8_t count; /* A05F7088 Read/Write 10010 */
|
nkeynes@2 | 34 | uint8_t disc; /* A05F708C Read-only 10011 */
|
nkeynes@2 | 35 | uint8_t lba0; /* A05F708C Write-only 10011 (NB: Presumed, TBV */
|
nkeynes@2 | 36 | uint8_t lba1; /* A05F7090 Read/Write 10100 */
|
nkeynes@2 | 37 | uint8_t lba2; /* A05F7094 Read/Write 10101 */
|
nkeynes@2 | 38 | uint8_t device; /* A05F7098 Read/Write 10110 */
|
nkeynes@2 | 39 | uint8_t command; /* A05F709C Write-only 10111 */
|
nkeynes@138 | 40 | uint8_t intrq_pending; /* Flag to indicate if the INTRQ line is active */
|
nkeynes@138 | 41 |
|
nkeynes@2 | 42 | /* We don't keep the data register per se, rather the currently pending
|
nkeynes@2 | 43 | * data is kept here and read out a byte at a time (in PIO mode) or all at
|
nkeynes@2 | 44 | * once (in DMA mode). The IDE routines are responsible for managing this
|
nkeynes@2 | 45 | * memory. If dataptr == NULL, there is no data available.
|
nkeynes@2 | 46 | */
|
nkeynes@125 | 47 | unsigned char *data;
|
nkeynes@2 | 48 | uint16_t *readptr, *writeptr;
|
nkeynes@2 | 49 | int datalen;
|
nkeynes@125 | 50 | int blocksize; /* Used to determine the transfer unit size */
|
nkeynes@125 | 51 | int blockleft; /* Bytes remaining in the current block */
|
nkeynes@2 | 52 | };
|
nkeynes@2 | 53 |
|
nkeynes@2 | 54 | #define IDE_ST_BUSY 0x80
|
nkeynes@2 | 55 | #define IDE_ST_READY 0x40
|
nkeynes@2 | 56 | #define IDE_ST_SERV 0x10
|
nkeynes@2 | 57 | #define IDE_ST_DATA 0x08
|
nkeynes@2 | 58 | #define IDE_ST_ERROR 0x01
|
nkeynes@2 | 59 |
|
nkeynes@2 | 60 | #define IDE_CTL_RESET 0x04
|
nkeynes@2 | 61 | #define IDE_CTL_IRQEN 0x02 /* IRQ enabled when == 0 */
|
nkeynes@2 | 62 |
|
nkeynes@2 | 63 | #define IDE_CMD_RESET_DEVICE 0x08
|
nkeynes@2 | 64 | #define IDE_CMD_PACKET 0xA0
|
nkeynes@2 | 65 | #define IDE_CMD_IDENTIFY_PACKET_DEVICE 0xA1
|
nkeynes@2 | 66 | #define IDE_CMD_SERVICE 0xA2
|
nkeynes@2 | 67 | #define IDE_CMD_SET_FEATURE 0xEF
|
nkeynes@2 | 68 |
|
nkeynes@47 | 69 | #define IDE_FEAT_SET_TRANSFER_MODE 0x03
|
nkeynes@47 | 70 | #define IDE_XFER_PIO 0x00
|
nkeynes@47 | 71 | #define IDE_XFER_PIO_FLOW 0x08
|
nkeynes@47 | 72 | #define IDE_XFER_MULTI_DMA 0x20
|
nkeynes@47 | 73 | #define IDE_XFER_ULTRA_DMA 0x40
|
nkeynes@47 | 74 |
|
nkeynes@138 | 75 |
|
nkeynes@2 | 76 |
|
nkeynes@2 | 77 | #define PKT_CMD_RESET 0x00 /* Wild-ass guess */
|
nkeynes@2 | 78 | #define PKT_CMD_IDENTIFY 0x11
|
nkeynes@125 | 79 | #define PKT_CMD_SENSE 0x13
|
nkeynes@125 | 80 | #define PKT_CMD_READ_TOC 0x14
|
nkeynes@125 | 81 | #define PKT_CMD_READ_SECTOR 0x30
|
nkeynes@2 | 82 |
|
nkeynes@2 | 83 | extern struct ide_registers idereg;
|
nkeynes@2 | 84 |
|
nkeynes@2 | 85 | /* Note: control can be written at any time - all other registers are writable
|
nkeynes@2 | 86 | * only when ide_can_write_regs() is true
|
nkeynes@2 | 87 | */
|
nkeynes@2 | 88 | #define ide_can_write_regs() ((idereg.status&0x88)==0)
|
nkeynes@125 | 89 | #define IS_IDE_IRQ_ENABLED() ((idereg.control&0x02)==0)
|
nkeynes@2 | 90 |
|
nkeynes@2 | 91 |
|
nkeynes@2 | 92 | uint16_t ide_read_data_pio(void);
|
nkeynes@125 | 93 | uint8_t ide_read_status(void);
|
nkeynes@2 | 94 | void ide_write_data_pio( uint16_t value );
|
nkeynes@125 | 95 | void ide_write_buffer( unsigned char *data, int length );
|
nkeynes@2 | 96 |
|
nkeynes@2 | 97 | void ide_write_command( uint8_t command );
|
nkeynes@2 | 98 | void ide_write_control( uint8_t value );
|
nkeynes@2 | 99 | #endif
|