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tree revision 936:f394309c399a lxdream-mem
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filename src/sh4/sh4dasm.in
changeset 873:cb3a8c502727
prev730:a0f02e769c2e
next939:6f2302afeb89
author nkeynes
date Sat Dec 27 02:59:35 2008 +0000 (15 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change Replace fpscr_mask/fpscr flags in xlat_cache_block with a single xlat_sh4_mode,
which tracks the field of the same name in sh4r - actually a little faster this way.
Now depends on SR.MD, FPSCR.PR and FPSCR.SZ (although it doesn't benefit from the SR
flag yet).

Also fixed the failure to check the flags in the common case (code address returned
by previous block) which took away the performance benefits, but oh well.
file annotate diff log raw
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/**
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 * $Id$
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 *
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 * SH4 CPU definition and disassembly functions
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include "sh4/sh4core.h"

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#include "sh4/sh4dasm.h"

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#include "mem.h"

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#define UNIMP(ir) snprintf( buf, len, "???     " )

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const struct reg_desc_struct sh4_reg_map[] = 

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  { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},

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    {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},

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    {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},

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    {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]},

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    {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]},

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    {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]},

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    {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]},

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    {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]},

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    {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr},

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    {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc},

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    {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr},

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    {"VBR",REG_INT, &sh4r.vbr},

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    {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr},

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    {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1},

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    {"FPUL", REG_INT, &sh4r.fpul.i}, {"FPSCR", REG_INT, &sh4r.fpscr},

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    {NULL, 0, NULL} };

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    43
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const struct cpu_desc_struct sh4_cpu_desc = 

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    { "SH4", sh4_disasm_instruction, sh4_execute_instruction, sh4_has_page, 

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      sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2,

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      (char *)&sh4r, sizeof(sh4r), sh4_reg_map,

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      &sh4r.pc };

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uint32_t sh4_disasm_instruction( sh4vma_t pc, char *buf, int len, char *opcode )

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{

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    sh4addr_t addr = mmu_vma_to_phys_disasm(pc);

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    uint16_t ir = sh4_read_word(addr);

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#define UNDEF(ir) snprintf( buf, len, "????    " );

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#define RN(ir) ((ir&0x0F00)>>8)

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#define RN_BANK(ir) ((ir&0x0070)>>4)

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#define RM(ir) ((ir&0x00F0)>>4)

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#define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */

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#define DISP8(ir) (ir&0x00FF)

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#define PCDISP8(ir) SIGNEXT8(ir&0x00FF)

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#define UIMM8(ir) (ir&0x00FF)

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#define IMM8(ir) SIGNEXT8(ir&0x00FF)

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#define DISP12(ir) SIGNEXT12(ir&0x0FFF)

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#define FVN(ir) ((ir&0x0C00)>>10)

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#define FVM(ir) ((ir&0x0300)>>8)

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    sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );

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%%

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ADD Rm, Rn       {: snprintf( buf, len, "ADD     R%d, R%d", Rm, Rn ); :}

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ADD #imm, Rn     {: snprintf( buf, len, "ADD     #%d, R%d", imm, Rn ); :}

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ADDC Rm, Rn      {: snprintf( buf, len, "ADDC    R%d, R%d", Rm, Rn ); :}

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ADDV Rm, Rn      {: snprintf( buf, len, "ADDV    R%d, R%d", Rm, Rn ); :}

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AND Rm, Rn       {: snprintf( buf, len, "AND     R%d, R%d", Rm, Rn ); :}

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AND #imm, R0     {: snprintf( buf, len, "AND     #%d, R0", imm ); :}

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AND.B #imm, @(R0, GBR) {: snprintf( buf, len, "AND.B   #%d, @(R0, GBR)", imm ); :}

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BF disp          {: snprintf( buf, len, "BF      $%xh", disp+pc+4 ); :}

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BF/S disp        {: snprintf( buf, len, "BF/S    $%xh", disp+pc+4 ); :}

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BRA disp         {: snprintf( buf, len, "BRA     $%xh", disp+pc+4 ); :}

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BRAF Rn          {: snprintf( buf, len, "BRAF    R%d", Rn ); :}

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BSR disp         {: snprintf( buf, len, "BSR     $%xh", disp+pc+4 ); :}

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BSRF Rn          {: snprintf( buf, len, "BSRF    R%d", Rn ); :}

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BT disp          {: snprintf( buf, len, "BT      $%xh", disp+pc+4 ); :}

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BT/S disp        {: snprintf( buf, len, "BT/S    $%xh", disp+pc+4 ); :}

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CLRMAC           {: snprintf( buf, len, "CLRMAC  " ); :}

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CLRS             {: snprintf( buf, len, "CLRS    " ); :}

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CLRT             {: snprintf( buf, len, "CLRT    " ); :}

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CMP/EQ Rm, Rn    {: snprintf( buf, len, "CMP/EQ  R%d, R%d", Rm, Rn ); :}

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CMP/EQ #imm, R0  {: snprintf( buf, len, "CMP/EQ  #%d, R0", imm ); :}

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CMP/GE Rm, Rn    {: snprintf( buf, len, "CMP/GE  R%d, R%d", Rm, Rn ); :}

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CMP/GT Rm, Rn    {: snprintf( buf, len, "CMP/GT  R%d, R%d", Rm, Rn ); :}

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CMP/HI Rm, Rn    {: snprintf( buf, len, "CMP/HI  R%d, R%d", Rm, Rn ); :}

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CMP/HS Rm, Rn    {: snprintf( buf, len, "CMP/HS  R%d, R%d", Rm, Rn ); :}

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CMP/PL Rn        {: snprintf( buf, len, "CMP/PL  R%d", Rn ); :}

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CMP/PZ Rn        {: snprintf( buf, len, "CMP/PZ  R%d", Rn ); :}

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CMP/STR Rm, Rn   {: snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn ); :}

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DIV0S Rm, Rn     {: snprintf( buf, len, "DIV0S   R%d, R%d", Rm, Rn ); :}

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DIV0U            {: snprintf( buf, len, "DIV0U   " ); :}

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DIV1 Rm, Rn      {: snprintf( buf, len, "DIV1    R%d, R%d", Rm, Rn ); :}

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   102
DMULS.L Rm, Rn   {: snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn ); :}

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DMULU.L RM, Rn   {: snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn ); :}

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DT Rn            {: snprintf( buf, len, "DT      R%d", Rn ); :}

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EXTS.B Rm, Rn    {: snprintf( buf, len, "EXTS.B  R%d, R%d", Rm, Rn ); :}

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EXTS.W Rm, Rn    {: snprintf( buf, len, "EXTS.W  R%d, R%d", Rm, Rn ); :}

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EXTU.B Rm, Rn    {: snprintf( buf, len, "EXTU.B  R%d, R%d", Rm, Rn ); :}

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EXTU.W Rm, Rn    {: snprintf( buf, len, "EXTU.W  R%d, R%d", Rm, Rn ); :}

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FABS FRn         {: snprintf( buf, len, "FABS    FR%d", FRn ); :}

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FADD FRm, FRn    {: snprintf( buf, len, "FADD    FR%d, FR%d", FRm, FRn ); :}

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FCMP/EQ FRm, FRn {: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn ); :}

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FCMP/GT FRm, FRn {: snprintf( buf, len, "FCMP/GT FR%d, FR%d", FRm, FRn ); :}

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FCNVDS FRm, FPUL {: snprintf( buf, len, "FCNVDS  FR%d, FPUL", FRm ); :}

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FCNVSD FPUL, FRn {: snprintf( buf, len, "FCNVSD  FPUL, FR%d", FRn ); :}

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FDIV FRm, FRn    {: snprintf( buf, len, "FDIV    FR%d, FR%d", FRm, FRn ); :}

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FIPR FVm, FVn    {: snprintf( buf, len, "FIPR    FV%d, FV%d", FVm, FVn ); :}

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FLDS FRm, FPUL   {: snprintf( buf, len, "FLDS    FR%d, FPUL", FRm ); :}

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FLDI0 FRn        {: snprintf( buf, len, "FLDI0   FR%d", FRn ); :}

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FLDI1 FRn        {: snprintf( buf, len, "FLDI1   FR%d", FRn ); :}

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FLOAT FPUL, FRn  {: snprintf( buf, len, "FLOAT   FPUL, FR%d", FRn ); :}

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FMAC FR0, FRm, FRn {: snprintf( buf, len, "FMAC    FR0, FR%d, FR%d", FRm, FRn ); :}

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FMOV FRm, FRn    {: snprintf( buf, len, "FMOV    FR%d, FR%d", FRm, FRn ); :}

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FMOV FRm, @Rn    {: snprintf( buf, len, "FMOV    FR%d, @R%d", FRm, Rn ); :}

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FMOV FRm, @-Rn   {: snprintf( buf, len, "FMOV    FR%d, @-R%d", FRm, Rn ); :}

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FMOV FRm, @(R0, Rn) {: snprintf( buf, len, "FMOV    FR%d, @(R0, R%d)", FRm, Rn ); :}

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FMOV @Rm, FRn    {: snprintf( buf, len, "FMOV    @R%d, FR%d", Rm, FRn ); :}

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FMOV @Rm+, FRn   {: snprintf( buf, len, "FMOV    @R%d+, FR%d", Rm, FRn ); :}

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FMOV @(R0, Rm), FRn {: snprintf( buf, len, "FMOV    @(R0, R%d), FR%d", Rm, FRn ); :}

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FMUL FRm, FRn    {: snprintf( buf, len, "FMUL    FR%d, FR%d", FRm, FRn ); :}

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FNEG FRn         {: snprintf( buf, len, "FNEG    FR%d", FRn ); :}

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FRCHG            {: snprintf( buf, len, "FRCHG   " ); :}

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FSCA FPUL, FRn   {: snprintf( buf, len, "FSCA    FPUL, FR%d", FRn ); :}

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FSCHG            {: snprintf( buf, len, "FSCHG   " ); :}

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FSQRT FRn        {: snprintf( buf, len, "FSQRT   FR%d", FRn ); :}

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FSRRA FRn        {: snprintf( buf, len, "FSRRA   FR%d", FRn ); :}

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FSTS FPUL, FRn   {: snprintf( buf, len, "FSTS    FPUL, FR%d", FRn ); :}

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FSUB FRm, FRn    {: snprintf( buf, len, "FSUB    FR%d, FR%d", FRm, FRn ); :}

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FTRC FRm, FPUL   {: snprintf( buf, len, "FTRC    FR%d, FPUL", FRm ); :}

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   139
FTRV XMTRX, FVn  {: snprintf( buf, len, "FTRV    XMTRX, FV%d", FVn ); :}

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JMP @Rn          {: snprintf( buf, len, "JMP     @R%d", Rn ); :}

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JSR @Rn          {: snprintf( buf, len, "JSR     @R%d", Rn ); :}

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LDC Rm, GBR      {: snprintf( buf, len, "LDC     R%d, GBR", Rm ); :}

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   143
LDC Rm, SR       {: snprintf( buf, len, "LDC     R%d, SR", Rm ); :}

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LDC Rm, VBR      {: snprintf( buf, len, "LDC     R%d, VBR", Rm ); :}

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LDC Rm, SSR      {: snprintf( buf, len, "LDC     R%d, SSR", Rm ); :}

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   146
LDC Rm, SGR      {: snprintf( buf, len, "LDC     R%d, SGR", Rm ); :}

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   147
LDC Rm, SPC      {: snprintf( buf, len, "LDC     R%d, SPC", Rm ); :}

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   148
LDC Rm, DBR      {: snprintf( buf, len, "LDC     R%d, DBR", Rm ); :}

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   149
LDC Rm, Rn_BANK  {: snprintf( buf, len, "LDC     R%d, R%d_BANK", Rm, Rn_BANK ); :}

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   150
LDS Rm, FPSCR    {: snprintf( buf, len, "LDS     R%d, FPSCR", Rm ); :}

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   151
LDS Rm, FPUL     {: snprintf( buf, len, "LDS     R%d, FPUL", Rm ); :}

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   152
LDS Rm, MACH     {: snprintf( buf, len, "LDS     R%d, MACH", Rm ); :}

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   153
LDS Rm, MACL     {: snprintf( buf, len, "LDS     R%d, MACL", Rm ); :}

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   154
LDS Rm, PR       {: snprintf( buf, len, "LDS     R%d, PR", Rm ); :}

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   155
LDC.L @Rm+, GBR  {: snprintf( buf, len, "LDC.L   @R%d+, GBR", Rm ); :}

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   156
LDC.L @Rm+, SR   {: snprintf( buf, len, "LDC.L   @R%d+, SR", Rm ); :}

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   157
LDC.L @Rm+, VBR  {: snprintf( buf, len, "LDC.L   @R%d+, VBR", Rm ); :}

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   158
LDC.L @Rm+, SSR  {: snprintf( buf, len, "LDC.L   @R%d+, SSR", Rm ); :}

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   159
LDC.L @Rm+, SGR  {: snprintf( buf, len, "LDC.L   @R%d+, SGR", Rm ); :}

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   160
LDC.L @Rm+, SPC  {: snprintf( buf, len, "LDC.L   @R%d+, SPC", Rm ); :}

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   161
LDC.L @Rm+, DBR  {: snprintf( buf, len, "LDC.L   @R%d+, DBR", Rm ); :}

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   162
LDC.L @Rm+, Rn_BANK{: snprintf( buf, len, "LDC.L   @R%d+, @R%d+_BANK", Rm, Rn_BANK ); :}

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   163
LDS.L @Rm+, FPSCR{: snprintf( buf, len, "LDS.L   @R%d+, FPSCR", Rm ); :}

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   164
LDS.L @Rm+, FPUL {: snprintf( buf, len, "LDS.L   @R%d+, FPUL", Rm ); :}

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   165
LDS.L @Rm+, MACH {: snprintf( buf, len, "LDS.L   @R%d+, MACH", Rm ); :}

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   166
LDS.L @Rm+, MACL {: snprintf( buf, len, "LDS.L   @R%d+, MACL", Rm ); :}

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   167
LDS.L @Rm+, PR   {: snprintf( buf, len, "LDS.L   @R%d+, PR", Rm ); :}

nkeynes@359
   168
LDTLB            {: snprintf( buf, len, "LDTLB   " ); :}

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   169
MAC.L @Rm+, @Rn+ {: snprintf( buf, len, "MAC.L   @R%d+, @R%d+", Rm, Rn ); :}

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   170
MAC.W @Rm+, @Rn+ {: snprintf( buf, len, "MAC.W   @R%d+, @R%d+", Rm, Rn ); :}

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   171
MOV Rm, Rn       {: snprintf( buf, len, "MOV     R%d, R%d", Rm, Rn ); :}

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   172
MOV #imm, Rn     {: snprintf( buf, len, "MOV     #%d, R%d", imm, Rn ); :}

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   173
MOV.B Rm, @Rn    {: snprintf( buf, len, "MOV.B   R%d, @R%d", Rm, Rn ); :}

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   174
MOV.B Rm, @-Rn   {: snprintf( buf, len, "MOV.B   R%d, @-R%d", Rm, Rn ); :}

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   175
MOV.B Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.B   R%d, @(R0, R%d)", Rm, Rn ); :}

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   176
MOV.B R0, @(disp, GBR) {: snprintf( buf, len, "MOV.B   R0, @(%d, GBR)", disp ); :}

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MOV.B R0, @(disp, Rn)  {: snprintf( buf, len, "MOV.B   R0, @(%d, R%d)", disp, Rn ); :}

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   178
MOV.B @Rm, Rn    {: snprintf( buf, len, "MOV.B   @R%d, R%d", Rm, Rn ); :}

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   179
MOV.B @Rm+, Rn   {: snprintf( buf, len, "MOV.B   @R%d+, R%d", Rm, Rn ); :}

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   180
MOV.B @(R0, Rm), Rn {: snprintf( buf, len, "MOV.B   @(R0, R%d), R%d", Rm, Rn ); :}

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   181
MOV.B @(disp, GBR), R0{: snprintf( buf, len, "MOV.B   @(%d, GBR), R0", disp ); :}

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   182
MOV.B @(disp, Rm), R0 {: snprintf( buf, len, "MOV.B   @(%d, R%d), R0", disp, Rm ); :}

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   183
MOV.L Rm, @Rn    {: snprintf( buf, len, "MOV.L   R%d, @R%d", Rm, Rn ); :}

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   184
MOV.L Rm, @-Rn   {: snprintf( buf, len, "MOV.L   R%d, @-R%d", Rm, Rn ); :}

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   185
MOV.L Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.L   R%d, @(R0, R%d)", Rm, Rn ); :}

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   186
MOV.L R0, @(disp, GBR) {: snprintf( buf, len, "MOV.L   R0, @(%d, GBR)", disp ); :}

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   187
MOV.L Rm, @(disp, Rn) {: snprintf( buf, len, "MOV.L   R%d, @(%d, R%d)", Rm, disp, Rn ); :}

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   188
MOV.L @Rm, Rn    {: snprintf( buf, len, "MOV.L   @R%d, R%d", Rm, Rn ); :}

nkeynes@359
   189
MOV.L @Rm+, Rn   {: snprintf( buf, len, "MOV.L   @R%d+, R%d", Rm, Rn ); :}

nkeynes@359
   190
MOV.L @(R0, Rm), Rn {: snprintf( buf, len, "MOV.L   @(R0, R%d), R%d", Rm, Rn ); :}

nkeynes@359
   191
MOV.L @(disp, GBR), R0 {: snprintf( buf, len, "MOV.L   @(%d, GBR), R0",disp ); :}

nkeynes@597
   192
MOV.L @(disp, PC), Rn  {: snprintf( buf, len, "MOV.L   @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(addr&0xFFFFFFFC)+4) ); :}

nkeynes@496
   193
MOV.L @(disp, Rm), Rn  {: snprintf( buf, len, "MOV.L   @(%d, R%d), R%d", disp, Rm, Rn ); :}

nkeynes@359
   194
MOV.W Rm, @Rn    {: snprintf( buf, len, "MOV.W   R%d, @R%d", Rm, Rn ); :}

nkeynes@359
   195
MOV.W Rm, @-Rn   {: snprintf( buf, len, "MOV.W   R%d, @-R%d", Rm, Rn ); :}

nkeynes@359
   196
MOV.W Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.W   R%d, @(R0, R%d)", Rm, Rn ); :}

nkeynes@359
   197
MOV.W R0, @(disp, GBR) {: snprintf( buf, len, "MOV.W   R0, @(%d, GBR)", disp); :}

nkeynes@430
   198
MOV.W R0, @(disp, Rn)  {: snprintf( buf, len, "MOV.W   R0, @(%d, R%d)", disp, Rn ); :}

nkeynes@359
   199
MOV.W @Rm, Rn    {: snprintf( buf, len, "MOV.W   @R%d, R%d", Rm, Rn ); :}

nkeynes@359
   200
MOV.W @Rm+, Rn   {: snprintf( buf, len, "MOV.W   @R%d+, R%d", Rm, Rn ); :}

nkeynes@359
   201
MOV.W @(R0, Rm), Rn {: snprintf( buf, len, "MOV.W   @(R0, R%d), R%d", Rm, Rn ); :}

nkeynes@359
   202
MOV.W @(disp, GBR), R0 {: snprintf( buf, len, "MOV.W   @(%d, GBR), R0", disp ); :}

nkeynes@597
   203
MOV.W @(disp, PC), Rn  {: snprintf( buf, len, "MOV.W   @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+addr+4) ); :}

nkeynes@359
   204
MOV.W @(disp, Rm), R0  {: snprintf( buf, len, "MOV.W   @(%d, R%d), R0", disp, Rm ); :}

nkeynes@359
   205
MOVA @(disp, PC), R0   {: snprintf( buf, len, "MOVA    @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 ); :}

nkeynes@359
   206
MOVCA.L R0, @Rn  {: snprintf( buf, len, "MOVCA.L R0, @R%d", Rn ); :}

nkeynes@359
   207
MOVT Rn          {: snprintf( buf, len, "MOVT    R%d", Rn ); :}

nkeynes@359
   208
MUL.L Rm, Rn     {: snprintf( buf, len, "MUL.L   R%d, R%d", Rm, Rn ); :}

nkeynes@359
   209
MULS.W Rm, Rn    {: snprintf( buf, len, "MULS.W  R%d, R%d", Rm, Rn ); :}

nkeynes@359
   210
MULU.W Rm, Rn    {: snprintf( buf, len, "MULU.W  R%d, R%d", Rm, Rn ); :}

nkeynes@359
   211
NEG Rm, Rn       {: snprintf( buf, len, "NEG     R%d, R%d", Rm, Rn ); :}

nkeynes@359
   212
NEGC Rm, Rn      {: snprintf( buf, len, "NEGC    R%d, R%d", Rm, Rn ); :}

nkeynes@359
   213
NOP              {: snprintf( buf, len, "NOP     " ); :}

nkeynes@359
   214
NOT Rm, Rn       {: snprintf( buf, len, "NOT     R%d, R%d", Rm, Rn ); :}

nkeynes@359
   215
OCBI @Rn         {: snprintf( buf, len, "OCBI    @R%d", Rn ); :}

nkeynes@359
   216
OCBP @Rn         {: snprintf( buf, len, "OCBP    @R%d", Rn ); :}

nkeynes@359
   217
OCBWB @Rn        {: snprintf( buf, len, "OCBWB   @R%d", Rn ); :}

nkeynes@359
   218
OR Rm, Rn        {: snprintf( buf, len, "OR      R%d, R%d", Rm, Rn ); :}

nkeynes@359
   219
OR #imm, R0      {: snprintf( buf, len, "OR      #%d, R0", imm ); :}

nkeynes@359
   220
OR.B #imm, @(R0, GBR) {: snprintf( buf, len, "OR.B    #%d, @(R0, GBR)", imm ); :}

nkeynes@359
   221
PREF @Rn         {: snprintf( buf, len, "PREF    R%d", Rn ); :}

nkeynes@359
   222
ROTCL Rn         {: snprintf( buf, len, "ROTCL   R%d", Rn ); :}

nkeynes@359
   223
ROTCR Rn         {: snprintf( buf, len, "ROTCR   R%d", Rn ); :}

nkeynes@359
   224
ROTL Rn          {: snprintf( buf, len, "ROTL    R%d", Rn ); :}

nkeynes@359
   225
ROTR Rn          {: snprintf( buf, len, "ROTR    R%d", Rn ); :}

nkeynes@359
   226
RTE              {: snprintf( buf, len, "RTE     " ); :}

nkeynes@359
   227
RTS              {: snprintf( buf, len, "RTS     " ); :}

nkeynes@359
   228
SETS             {: snprintf( buf, len, "SETS    " ); :}

nkeynes@359
   229
SETT             {: snprintf( buf, len, "SETT    " ); :}

nkeynes@359
   230
SHAD Rm, Rn      {: snprintf( buf, len, "SHAD    R%d, R%d", Rm, Rn ); :}

nkeynes@359
   231
SHAL Rn          {: snprintf( buf, len, "SHAL    R%d", Rn ); :}

nkeynes@359
   232
SHAR Rn          {: snprintf( buf, len, "SHAR    R%d", Rn ); :}

nkeynes@359
   233
SHLD Rm, Rn      {: snprintf( buf, len, "SHLD    R%d, R%d", Rm, Rn ); :}

nkeynes@359
   234
SHLL Rn          {: snprintf( buf, len, "SHLL    R%d", Rn ); :}

nkeynes@359
   235
SHLL2 Rn         {: snprintf( buf, len, "SHLL2   R%d", Rn ); :}

nkeynes@359
   236
SHLL8 Rn         {: snprintf( buf, len, "SHLL8   R%d", Rn ); :}

nkeynes@359
   237
SHLL16 Rn        {: snprintf( buf, len, "SHLL16  R%d", Rn ); :}

nkeynes@359
   238
SHLR Rn          {: snprintf( buf, len, "SHLR    R%d", Rn ); :}

nkeynes@359
   239
SHLR2 Rn         {: snprintf( buf, len, "SHLR2   R%d", Rn ); :}

nkeynes@359
   240
SHLR8 Rn         {: snprintf( buf, len, "SHLR8   R%d", Rn ); :}

nkeynes@359
   241
SHLR16 Rn        {: snprintf( buf, len, "SHLR16  R%d", Rn ); :}

nkeynes@359
   242
SLEEP            {: snprintf( buf, len, "SLEEP   " ); :}

nkeynes@359
   243
STC SR, Rn       {: snprintf( buf, len, "STC     SR, R%d", Rn ); :}

nkeynes@359
   244
STC GBR, Rn      {: snprintf( buf, len, "STC     GBR, R%d", Rn ); :}

nkeynes@359
   245
STC VBR, Rn      {: snprintf( buf, len, "STC     VBR, R%d", Rn ); :}

nkeynes@359
   246
STC SSR, Rn      {: snprintf( buf, len, "STC     SSR, R%d", Rn ); :}

nkeynes@359
   247
STC SPC, Rn      {: snprintf( buf, len, "STC     SPC, R%d", Rn ); :}

nkeynes@359
   248
STC SGR, Rn      {: snprintf( buf, len, "STC     SGR, R%d", Rn ); :}

nkeynes@359
   249
STC DBR, Rn      {: snprintf( buf, len, "STC     DBR, R%d", Rn ); :}

nkeynes@359
   250
STC Rm_BANK, Rn  {: snprintf( buf, len, "STC     R%d_BANK, R%d", Rm_BANK, Rn ); :}

nkeynes@359
   251
STS FPSCR, Rn    {: snprintf( buf, len, "STS     FPSCR, R%d", Rn ); :}

nkeynes@359
   252
STS FPUL, Rn     {: snprintf( buf, len, "STS     FPUL, R%d", Rn ); :}

nkeynes@359
   253
STS MACH, Rn     {: snprintf( buf, len, "STS     MACH, R%d", Rn ); :}

nkeynes@359
   254
STS MACL, Rn     {: snprintf( buf, len, "STS     MACL, R%d", Rn ); :}

nkeynes@359
   255
STS PR, Rn       {: snprintf( buf, len, "STS     PR, R%d", Rn ); :}

nkeynes@359
   256
STC.L SR, @-Rn   {: snprintf( buf, len, "STC.L   SR, @-R%d", Rn ); :}

nkeynes@359
   257
STC.L GBR, @-Rn  {: snprintf( buf, len, "STC.L   GBR, @-R%d", Rn ); :}

nkeynes@359
   258
STC.L VBR, @-Rn  {: snprintf( buf, len, "STC.L   VBR, @-R%d", Rn ); :}

nkeynes@359
   259
STC.L SSR, @-Rn  {: snprintf( buf, len, "STC.L   SSR, @-R%d", Rn ); :}

nkeynes@359
   260
STC.L SPC, @-Rn  {: snprintf( buf, len, "STC.L   SPC, @-R%d", Rn ); :}

nkeynes@359
   261
STC.L SGR, @-Rn  {: snprintf( buf, len, "STC.L   SGR, @-R%d", Rn ); :}

nkeynes@359
   262
STC.L DBR, @-Rn  {: snprintf( buf, len, "STC.L    DBR, @-R%d", Rn ); :}

nkeynes@359
   263
STC.L Rm_BANK, @-Rn {: snprintf( buf, len, "STC.L   @-R%d_BANK, @-R%d", Rm_BANK, Rn ); :}

nkeynes@359
   264
STS.L FPSCR, @-Rn{: snprintf( buf, len, "STS.L   FPSCR, @-R%d", Rn ); :}

nkeynes@359
   265
STS.L FPUL, @-Rn {: snprintf( buf, len, "STS.L   FPUL, @-R%d", Rn ); :}

nkeynes@359
   266
STS.L MACH, @-Rn {: snprintf( buf, len, "STS.L   MACH, @-R%d", Rn ); :}

nkeynes@359
   267
STS.L MACL, @-Rn {: snprintf( buf, len, "STS.L   MACL, @-R%d", Rn ); :}

nkeynes@359
   268
STS.L PR, @-Rn   {: snprintf( buf, len, "STS.L   PR, @-R%d", Rn ); :}

nkeynes@359
   269
SUB Rm, Rn       {: snprintf( buf, len, "SUB     R%d, R%d", Rm, Rn ); :}

nkeynes@359
   270
SUBC Rm, Rn      {: snprintf( buf, len, "SUBC    R%d, R%d", Rm, Rn ); :}

nkeynes@359
   271
SUBV Rm, Rn      {: snprintf( buf, len, "SUBV    R%d, R%d", Rm, Rn ); :}

nkeynes@359
   272
SWAP.B Rm, Rn    {: snprintf( buf, len, "SWAP.B  R%d, R%d", Rm, Rn ); :}

nkeynes@359
   273
SWAP.W Rm, Rn    {: snprintf( buf, len, "SWAP.W  R%d, R%d", Rm, Rn ); :}

nkeynes@359
   274
TAS.B @Rn        {: snprintf( buf, len, "TAS.B   R%d", Rn ); :}

nkeynes@359
   275
TRAPA #imm       {: snprintf( buf, len, "TRAPA   #%d", imm ); :}

nkeynes@359
   276
TST Rm, Rn       {: snprintf( buf, len, "TST     R%d, R%d", Rm, Rn ); :}

nkeynes@359
   277
TST #imm, R0     {: snprintf( buf, len, "TST     #%d, R0", imm ); :}

nkeynes@359
   278
TST.B #imm, @(R0, GBR) {: snprintf( buf, len, "TST.B   #%d, @(R0, GBR)", imm ); :}

nkeynes@359
   279
XOR Rm, Rn       {: snprintf( buf, len, "XOR     R%d, R%d", Rm, Rn ); :}

nkeynes@359
   280
XOR #imm, R0     {: snprintf( buf, len, "XOR     #%d, R0", imm ); :}

nkeynes@359
   281
XOR.B #imm, @(R0, GBR) {: snprintf( buf, len, "XOR.B   #%d, @(R0, GBR)", imm ); :}

nkeynes@359
   282
XTRCT Rm, Rn     {: snprintf( buf, len, "XTRCT   R%d, R%d", Rm, Rn ); :}

nkeynes@359
   283
UNDEF            {: snprintf( buf, len, "UNDEF   " ); :}

nkeynes@359
   284
%%

nkeynes@359
   285
    return pc+2;

nkeynes@359
   286
}

nkeynes@359
   287
nkeynes@359
   288
nkeynes@586
   289
void sh4_disasm_region( FILE *f, int from, int to )

nkeynes@359
   290
{

nkeynes@359
   291
    int pc;

nkeynes@359
   292
    char buf[80];

nkeynes@359
   293
    char opcode[16];

nkeynes@359
   294
    

nkeynes@359
   295
    for( pc = from; pc < to; pc+=2 ) {

nkeynes@359
   296
        buf[0] = '\0';

nkeynes@359
   297
        sh4_disasm_instruction( pc,

nkeynes@359
   298
                                buf, sizeof(buf), opcode );

nkeynes@359
   299
        fprintf( f, "  %08x:  %s  %s\n", pc, opcode, buf );

nkeynes@359
   300
    }

nkeynes@359
   301
}

nkeynes@706
   302
nkeynes@706
   303
void sh4_dump_region( int from, int to )

nkeynes@706
   304
{

nkeynes@706
   305
    sh4_disasm_region( stdout, from, to );

nkeynes@706
   306
}








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