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lxdream.org :: lxdream/src/pvr2/pvr2mmio.h :: diff
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2mmio.h
changeset 197:f65ff8c8320d
prev193:31151fcc3cb7
next261:93fdb2a70e18
author nkeynes
date Wed Jan 03 09:00:17 2007 +0000 (17 years ago)
permissions -rw-r--r--
last change Adjust timers when they're read rather than waiting until the next time
slice. Also temporarily cut the CPU time by 4.
Initialize the FRQCR register to 0x0E0A for convenience
file annotate diff log raw
1.1 --- a/src/pvr2/pvr2mmio.h Fri Aug 04 01:38:30 2006 +0000
1.2 +++ b/src/pvr2/pvr2mmio.h Wed Jan 03 09:00:17 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: pvr2mmio.h,v 1.6 2006-08-04 01:38:27 nkeynes Exp $
1.6 + * $Id: pvr2mmio.h,v 1.7 2006-08-06 02:47:08 nkeynes Exp $
1.7 *
1.8 * PVR2 (video chip) MMIO register definitions.
1.9 *
1.10 @@ -21,19 +21,19 @@
1.11 MMIO_REGION_BEGIN( 0x005F8000, PVR2, "Power VR/2" )
1.12 LONG_PORT( 0x000, PVRID, PORT_R, 0x17FD11DB, "PVR2 Core ID" )
1.13 LONG_PORT( 0x004, PVRVER, PORT_R, 0x00000011, "PVR2 Core Version" )
1.14 - LONG_PORT( 0x008, PVRRST, PORT_MRW, 0, "PVR2 Reset" )
1.15 + LONG_PORT( 0x008, PVRRESET, PORT_MRW, 0, "PVR2 Reset" )
1.16 LONG_PORT( 0x014, RENDER_START, PORT_W, 0, "Start render" )
1.17 LONG_PORT( 0x018, PVRUNK1, PORT_MRW, 0, "PVR2 unknown register 1" )
1.18 LONG_PORT( 0x020, RENDER_POLYBASE, PORT_MRW, 0, "Object buffer base offset" )
1.19 LONG_PORT( 0x02C, RENDER_TILEBASE, PORT_MRW, 0, "Tile buffer base offset" )
1.20 LONG_PORT( 0x030, RENDER_TSPCFG, PORT_MRW, 0, "TSP config?" )
1.21 - LONG_PORT( 0x040, DISPBORDER, PORT_MRW, 0, "Border Colour (RGB)" )
1.22 - LONG_PORT( 0x044, DISPMODE, PORT_MRW, 0, "Display Mode" )
1.23 + LONG_PORT( 0x040, DISP_BORDER, PORT_MRW, 0, "Border Colour (RGB)" )
1.24 + LONG_PORT( 0x044, DISP_MODE, PORT_MRW, 0, "Display Mode" )
1.25 LONG_PORT( 0x048, RENDER_MODE, PORT_MRW, 0, "Rendering Mode" )
1.26 LONG_PORT( 0x04C, RENDER_SIZE, PORT_MRW, 0, "Rendering width (bytes/2)" )
1.27 - LONG_PORT( 0x050, DISPADDR1, PORT_MRW, 0, "Video memory base 1" )
1.28 - LONG_PORT( 0x054, DISPADDR2, PORT_MRW, 0, "Video memory base 2" )
1.29 - LONG_PORT( 0x05C, DISPSIZE, PORT_MRW, 0, "Display size" )
1.30 + LONG_PORT( 0x050, DISP_ADDR1, PORT_MRW, 0, "Video memory base 1" )
1.31 + LONG_PORT( 0x054, DISP_ADDR2, PORT_MRW, 0, "Video memory base 2" )
1.32 + LONG_PORT( 0x05C, DISP_SIZE, PORT_MRW, 0, "Display size" )
1.33 LONG_PORT( 0x060, RENDER_ADDR1, PORT_MRW, 0, "Rendering memory base 1" )
1.34 LONG_PORT( 0x064, RENDER_ADDR2, PORT_MRW, 0, "Rendering memory base 2" )
1.35 LONG_PORT( 0x068, RENDER_HCLIP, PORT_MRW, 0, "Horizontal clipping area" )
1.36 @@ -41,29 +41,38 @@
1.37 LONG_PORT( 0x074, RENDER_SHADOW, PORT_MRW, 0, "Shadowing" )
1.38 LONG_PORT( 0x078, RENDER_NEARCLIP, PORT_MRW, 0, "Object clip distance (float32)" )
1.39 LONG_PORT( 0x07C, RENDER_OBJCFG, PORT_MRW, 0, "Object config" )
1.40 + LONG_PORT( 0x080, PVRUNK2, PORT_MRW, 0, "PVR2 unknown register 2" )
1.41 LONG_PORT( 0x084, RENDER_TSPCLIP, PORT_MRW, 0, "Texture clip distance (float32)" )
1.42 LONG_PORT( 0x088, RENDER_FARCLIP, PORT_MRW, 0, "Background plane depth (float32)" )
1.43 LONG_PORT( 0x08C, RENDER_BGPLANE, PORT_MRW, 0, "Background plane config" )
1.44 LONG_PORT( 0x098, RENDER_ISPCFG, PORT_MRW, 0, "ISP config" )
1.45 + LONG_PORT( 0x0A0, VRAM_CFG1, PORT_MRW, 0, "VRAM config 1" )
1.46 + LONG_PORT( 0x0A4, VRAM_CFG2, PORT_MRW, 0, "VRAM config 2" )
1.47 + LONG_PORT( 0x0A8, VRAM_CFG3, PORT_MRW, 0, "VRAM config 3" )
1.48 LONG_PORT( 0x0B0, RENDER_FOGTBLCOL, PORT_MRW, 0, "Fog table colour" )
1.49 LONG_PORT( 0x0B4, RENDER_FOGVRTCOL, PORT_MRW, 0, "Fog vertex colour" )
1.50 LONG_PORT( 0x0B8, RENDER_FOGCOEFF, PORT_MRW, 0, "Fog density coefficient (float16)" )
1.51 LONG_PORT( 0x0BC, RENDER_CLAMPHI, PORT_MRW, 0, "Clamp high colour" )
1.52 LONG_PORT( 0x0C0, RENDER_CLAMPLO, PORT_MRW, 0, "Clamp low colour" )
1.53 LONG_PORT( 0x0C4, GUNPOS, PORT_MRW, 0, "Lightgun position" )
1.54 - LONG_PORT( 0x0C8, HPOS_IRQ, PORT_MRW, 0, "Raster horizontal event position" )
1.55 - LONG_PORT( 0x0CC, VPOS_IRQ, PORT_MRW, 0, "Raster event position" )
1.56 - LONG_PORT( 0x0D0, DISPCFG, PORT_MRW, 0, "Sync configuration & enable" )
1.57 - LONG_PORT( 0x0D4, HBORDER, PORT_MRW, 0, "Horizontal border area" )
1.58 - LONG_PORT( 0x0D8, REFRESH, PORT_MRW, 0, "Refresh rates?" )
1.59 - LONG_PORT( 0x0DC, VBORDER, PORT_MRW, 0, "Vertical border area" )
1.60 - LONG_PORT( 0x0E0, SYNCPOS, PORT_MRW, 0, "Sync pulse timing" )
1.61 + LONG_PORT( 0x0C8, DISP_HPOSIRQ, PORT_MRW, 0, "Raster horizontal event position" )
1.62 + LONG_PORT( 0x0CC, DISP_VPOSIRQ, PORT_MRW, 0, "Raster event position" )
1.63 + LONG_PORT( 0x0D0, DISP_CFG, PORT_MRW, 0, "Sync configuration & enable" )
1.64 + LONG_PORT( 0x0D4, DISP_HBORDER, PORT_MRW, 0, "Horizontal border area" )
1.65 + LONG_PORT( 0x0D8, DISP_SYNC, PORT_MRW, 0, "Sync pulse timing" )
1.66 + LONG_PORT( 0x0DC, DISP_VBORDER, PORT_MRW, 0, "Vertical border area" )
1.67 + LONG_PORT( 0x0E0, DISP_SYNC2, PORT_MRW, 0, "Sync pulse widths" )
1.68 LONG_PORT( 0x0E4, RENDER_TEXSIZE, PORT_MRW, 0, "Texture modulo width" )
1.69 - LONG_PORT( 0x0E8, DISPCFG2, PORT_MRW, 0, "Video configuration 2" )
1.70 - LONG_PORT( 0x0F0, VPOS, PORT_MRW, 0, "Vertical display position" )
1.71 + LONG_PORT( 0x0E8, DISP_CFG2, PORT_MRW, 0, "Video configuration 2" )
1.72 + LONG_PORT( 0x0EC, DISP_HPOS, PORT_MRW, 0, "Horizontal display position" )
1.73 + LONG_PORT( 0x0F0, DISP_VPOS, PORT_MRW, 0, "Vertical display position" )
1.74 LONG_PORT( 0x0F4, SCALERCFG, PORT_MRW, 0, "Scaler configuration (?)" )
1.75 LONG_PORT( 0x108, RENDER_PALETTE, PORT_MRW, 0, "Palette configuration" )
1.76 - LONG_PORT( 0x10C, BEAMPOS, PORT_R, 0, "Raster beam position" )
1.77 + LONG_PORT( 0x10C, DISP_BEAMPOS, PORT_R, 0, "Raster beam position" )
1.78 + LONG_PORT( 0x110, PVRUNK3, PORT_MRW, 0, "PVR2 unknown register 3" )
1.79 + LONG_PORT( 0x114, PVRUNK4, PORT_MRW, 0, "PVR2 unknown register 4" )
1.80 + LONG_PORT( 0x118, PVRUNK5, PORT_MRW, 0, "PVR2 unkown register 5" )
1.81 + LONG_PORT( 0x11C, PVRUNK6, PORT_MRW, 0, "PVR2 unkown register 6" )
1.82 LONG_PORT( 0x124, TA_TILEBASE, PORT_MRW, 0, "TA Tile matrix start" )
1.83 LONG_PORT( 0x128, TA_POLYBASE, PORT_MRW, 0, "TA Polygon buffer start" )
1.84 LONG_PORT( 0x12C, TA_LISTEND, PORT_MRW, 0, "TA Tile matrix end" )
1.85 @@ -73,7 +82,12 @@
1.86 LONG_PORT( 0x13C, TA_TILESIZE, PORT_MRW, 0, "TA Tile matrix size" )
1.87 LONG_PORT( 0x140, TA_TILECFG, PORT_MRW, 0, "TA Tile matrix config" )
1.88 LONG_PORT( 0x144, TA_INIT, PORT_W, 0, "TA Initialize" )
1.89 + LONG_PORT( 0x148, YUV_ADDR, PORT_MRW, 0, "YUV conversion address" )
1.90 + LONG_PORT( 0x14C, YUV_CFG, PORT_MRW, 0, "YUV configuration" )
1.91 + LONG_PORT( 0x150, YUV_COUNT, PORT_MR, 0, "YUV conversion count" )
1.92 + LONG_PORT( 0x160, TA_REINIT, PORT_W, 0, "TA re-initialize" )
1.93 LONG_PORT( 0x164, TA_LISTBASE, PORT_MRW, 0, "TA Tile list start" )
1.94 + LONG_PORT( 0x1A8, PVRUNK7, PORT_MRW, 0, "PVR2 unknown register 7" )
1.95 MMIO_REGION_END
1.96
1.97 MMIO_REGION_BEGIN( 0x005F9000, PVR2PAL, "Power VR/2 CLUT Palettes" )
.