1.1 --- a/src/maple/maple.c	Thu Jun 15 10:32:42 2006 +0000
     1.2 +++ b/src/maple/maple.c	Thu Jun 15 10:33:08 2006 +0000
     1.3 @@ -1,5 +1,5 @@
     1.4  /**
     1.5 - * $Id: maple.c,v 1.8 2006-05-15 08:28:52 nkeynes Exp $
     1.6 + * $Id: maple.c,v 1.9 2006-06-15 10:33:05 nkeynes Exp $
     1.7   *
     1.8   * Implements the core Maple bus, including DMA transfers to and from the bus.
     1.9   *
    1.10 @@ -133,7 +133,6 @@
    1.11                  }
    1.12              }
    1.13  
    1.14 -            INFO( "Maple packet %d: Cmd %d on port %d device %d", count, cmd, port, periph );
    1.15              maple_device_t dev = maple_devices[port][periph];
    1.16              if( dev == NULL ) {
    1.17                  /* no device attached */

     2.1 --- a/src/pvr2/pvr2.c	Thu Jun 15 10:32:42 2006 +0000
     2.2 +++ b/src/pvr2/pvr2.c	Thu Jun 15 10:33:08 2006 +0000
     2.3 @@ -1,5 +1,5 @@
     2.4  /**
     2.5 - * $Id: pvr2.c,v 1.25 2006-05-24 11:48:58 nkeynes Exp $
     2.6 + * $Id: pvr2.c,v 1.26 2006-06-15 10:33:08 nkeynes Exp $
     2.7   *
     2.8   * PVR2 (Video) Core module implementation and MMIO registers.
     2.9   *
    2.10 @@ -215,8 +215,6 @@
    2.11  	ERROR( "Write attempted to readonly register PVRID: ", val );
    2.12  	return;
    2.13      }
    2.14 -    INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val, 
    2.15 -          MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
    2.16  
    2.17      MMIO_WRITE( PVR2, reg, val );
    2.18