nkeynes@11 | 1 | /**
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nkeynes@73 | 2 | * $Id: aica.c,v 1.12 2006-01-12 11:30:19 nkeynes Exp $
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nkeynes@11 | 3 | *
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nkeynes@11 | 4 | * This is the core sound system (ie the bit which does the actual work)
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nkeynes@11 | 5 | *
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nkeynes@11 | 6 | * Copyright (c) 2005 Nathan Keynes.
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nkeynes@11 | 7 | *
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nkeynes@11 | 8 | * This program is free software; you can redistribute it and/or modify
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nkeynes@11 | 9 | * it under the terms of the GNU General Public License as published by
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nkeynes@11 | 10 | * the Free Software Foundation; either version 2 of the License, or
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nkeynes@11 | 11 | * (at your option) any later version.
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nkeynes@11 | 12 | *
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nkeynes@11 | 13 | * This program is distributed in the hope that it will be useful,
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nkeynes@11 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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nkeynes@11 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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nkeynes@11 | 16 | * GNU General Public License for more details.
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nkeynes@11 | 17 | */
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nkeynes@11 | 18 |
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nkeynes@35 | 19 | #define MODULE aica_module
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nkeynes@35 | 20 |
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nkeynes@11 | 21 | #include "dream.h"
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nkeynes@66 | 22 | #include "dreamcast.h"
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nkeynes@15 | 23 | #include "mem.h"
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nkeynes@11 | 24 | #include "aica.h"
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nkeynes@61 | 25 | #include "armcore.h"
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nkeynes@66 | 26 | #include "audio.h"
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nkeynes@11 | 27 | #define MMIO_IMPL
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nkeynes@11 | 28 | #include "aica.h"
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nkeynes@11 | 29 |
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nkeynes@11 | 30 | MMIO_REGION_READ_DEFFN( AICA0 )
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nkeynes@11 | 31 | MMIO_REGION_READ_DEFFN( AICA1 )
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nkeynes@11 | 32 | MMIO_REGION_READ_DEFFN( AICA2 )
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nkeynes@11 | 33 |
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nkeynes@23 | 34 | void aica_init( void );
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nkeynes@23 | 35 | void aica_reset( void );
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nkeynes@23 | 36 | void aica_start( void );
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nkeynes@23 | 37 | void aica_stop( void );
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nkeynes@35 | 38 | void aica_save_state( FILE *f );
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nkeynes@35 | 39 | int aica_load_state( FILE *f );
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nkeynes@30 | 40 | uint32_t aica_run_slice( uint32_t );
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nkeynes@23 | 41 |
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nkeynes@23 | 42 | struct dreamcast_module aica_module = { "AICA", aica_init, aica_reset,
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nkeynes@23 | 43 | aica_start, aica_run_slice, aica_stop,
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nkeynes@35 | 44 | aica_save_state, aica_load_state };
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nkeynes@15 | 45 |
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nkeynes@11 | 46 | /**
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nkeynes@11 | 47 | * Initialize the AICA subsystem. Note requires that
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nkeynes@11 | 48 | */
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nkeynes@11 | 49 | void aica_init( void )
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nkeynes@11 | 50 | {
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nkeynes@11 | 51 | register_io_regions( mmio_list_spu );
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nkeynes@11 | 52 | MMIO_NOTRACE(AICA0);
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nkeynes@11 | 53 | MMIO_NOTRACE(AICA1);
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nkeynes@11 | 54 | arm_mem_init();
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nkeynes@66 | 55 | aica_reset();
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nkeynes@66 | 56 | audio_set_output( &esd_audio_driver, 44100, AUDIO_FMT_16BIT|AUDIO_FMT_STEREO );
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nkeynes@11 | 57 | }
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nkeynes@11 | 58 |
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nkeynes@11 | 59 | void aica_reset( void )
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nkeynes@11 | 60 | {
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nkeynes@35 | 61 | arm_reset();
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nkeynes@66 | 62 | aica_event(2); /* Pre-deliver a timer interrupt */
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nkeynes@11 | 63 | }
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nkeynes@11 | 64 |
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nkeynes@23 | 65 | void aica_start( void )
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nkeynes@23 | 66 | {
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nkeynes@23 | 67 |
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nkeynes@23 | 68 | }
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nkeynes@23 | 69 |
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nkeynes@66 | 70 | /**
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nkeynes@66 | 71 | * Keep track of what we've done so far this second, to try to keep the
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nkeynes@66 | 72 | * precision of samples/second.
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nkeynes@66 | 73 | */
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nkeynes@66 | 74 | int samples_done = 0;
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nkeynes@66 | 75 | uint32_t nanosecs_done = 0;
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nkeynes@66 | 76 |
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nkeynes@30 | 77 | uint32_t aica_run_slice( uint32_t nanosecs )
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nkeynes@23 | 78 | {
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nkeynes@23 | 79 | /* Run arm instructions */
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nkeynes@35 | 80 | int reset = MMIO_READ( AICA2, AICA_RESET );
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nkeynes@66 | 81 | if( (reset & 1) == 0 ) { /* Running */
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nkeynes@66 | 82 | int num_samples = (nanosecs_done + nanosecs) / AICA_SAMPLE_RATE - samples_done;
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nkeynes@73 | 83 | num_samples = arm_run_slice( num_samples );
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nkeynes@73 | 84 | audio_mix_samples( num_samples );
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nkeynes@73 | 85 |
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nkeynes@66 | 86 | samples_done += num_samples;
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nkeynes@66 | 87 | nanosecs_done += nanosecs;
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nkeynes@35 | 88 | }
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nkeynes@73 | 89 | if( nanosecs_done > 1000000000 ) {
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nkeynes@73 | 90 | samples_done -= AICA_SAMPLE_RATE;
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nkeynes@73 | 91 | nanosecs_done -= 1000000000;
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nkeynes@73 | 92 | }
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nkeynes@43 | 93 | return nanosecs;
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nkeynes@23 | 94 | }
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nkeynes@23 | 95 |
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nkeynes@23 | 96 | void aica_stop( void )
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nkeynes@23 | 97 | {
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nkeynes@23 | 98 |
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nkeynes@23 | 99 | }
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nkeynes@23 | 100 |
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nkeynes@35 | 101 | void aica_save_state( FILE *f )
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nkeynes@35 | 102 | {
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nkeynes@35 | 103 | arm_save_state( f );
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nkeynes@35 | 104 | }
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nkeynes@35 | 105 |
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nkeynes@35 | 106 | int aica_load_state( FILE *f )
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nkeynes@35 | 107 | {
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nkeynes@35 | 108 | return arm_load_state( f );
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nkeynes@35 | 109 | }
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nkeynes@35 | 110 |
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nkeynes@61 | 111 | int aica_event_pending = 0;
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nkeynes@61 | 112 | int aica_clear_count = 0;
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nkeynes@61 | 113 |
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nkeynes@61 | 114 | /* Note: This is probably not necessarily technically correct but it should
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nkeynes@61 | 115 | * work in the meantime.
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nkeynes@61 | 116 | */
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nkeynes@61 | 117 |
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nkeynes@61 | 118 | void aica_event( int event )
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nkeynes@61 | 119 | {
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nkeynes@61 | 120 | if( aica_event_pending == 0 )
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nkeynes@61 | 121 | armr.int_pending |= CPSR_F;
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nkeynes@61 | 122 | aica_event_pending |= (1<<event);
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nkeynes@61 | 123 |
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nkeynes@61 | 124 | int pending = MMIO_READ( AICA2, AICA_IRQ );
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nkeynes@61 | 125 | if( pending == 0 || event < pending )
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nkeynes@61 | 126 | MMIO_WRITE( AICA2, AICA_IRQ, event );
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nkeynes@61 | 127 | }
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nkeynes@61 | 128 |
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nkeynes@61 | 129 | void aica_clear_event( )
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nkeynes@61 | 130 | {
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nkeynes@61 | 131 | aica_clear_count++;
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nkeynes@61 | 132 | if( aica_clear_count == 4 ) {
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nkeynes@61 | 133 | int i;
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nkeynes@61 | 134 | aica_clear_count = 0;
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nkeynes@61 | 135 |
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nkeynes@61 | 136 | for( i=0; i<8; i++ ) {
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nkeynes@61 | 137 | if( aica_event_pending & (1<<i) ) {
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nkeynes@61 | 138 | aica_event_pending &= ~(1<<i);
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nkeynes@61 | 139 | break;
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nkeynes@61 | 140 | }
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nkeynes@61 | 141 | }
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nkeynes@61 | 142 | for( ;i<8; i++ ) {
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nkeynes@61 | 143 | if( aica_event_pending & (1<<i) ) {
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nkeynes@61 | 144 | MMIO_WRITE( AICA2, AICA_IRQ, i );
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nkeynes@61 | 145 | break;
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nkeynes@61 | 146 | }
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nkeynes@61 | 147 | }
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nkeynes@61 | 148 | if( aica_event_pending == 0 )
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nkeynes@61 | 149 | armr.int_pending &= ~CPSR_F;
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nkeynes@61 | 150 | }
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nkeynes@61 | 151 | }
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nkeynes@66 | 152 |
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nkeynes@11 | 153 | /** Channel register structure:
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nkeynes@43 | 154 | * 00 4 Channel config
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nkeynes@43 | 155 | * 04 4 Waveform address lo (16 bits)
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nkeynes@11 | 156 | * 08 4 Loop start address
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nkeynes@11 | 157 | * 0C 4 Loop end address
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nkeynes@11 | 158 | * 10 4 Volume envelope
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nkeynes@43 | 159 | * 14 4 Init to 0x1F
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nkeynes@43 | 160 | * 18 4 Frequency (floating point)
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nkeynes@43 | 161 | * 1C 4 ??
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nkeynes@43 | 162 | * 20 4 ??
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nkeynes@11 | 163 | * 24 1 Pan
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nkeynes@11 | 164 | * 25 1 ??
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nkeynes@11 | 165 | * 26
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nkeynes@11 | 166 | * 27
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nkeynes@11 | 167 | * 28 1 ??
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nkeynes@11 | 168 | * 29 1 Volume
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nkeynes@11 | 169 | * 2C
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nkeynes@11 | 170 | * 30
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nkeynes@11 | 171 | *
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nkeynes@11 | 172 |
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nkeynes@11 | 173 | /* Write to channels 0-31 */
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nkeynes@11 | 174 | void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
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nkeynes@11 | 175 | {
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nkeynes@35 | 176 | MMIO_WRITE( AICA0, reg, val );
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nkeynes@66 | 177 | aica_write_channel( reg >> 7, reg % 128, val );
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nkeynes@37 | 178 | // DEBUG( "AICA0 Write %08X => %08X", val, reg );
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nkeynes@11 | 179 | }
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nkeynes@11 | 180 |
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nkeynes@11 | 181 | /* Write to channels 32-64 */
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nkeynes@11 | 182 | void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
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nkeynes@11 | 183 | {
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nkeynes@35 | 184 | MMIO_WRITE( AICA1, reg, val );
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nkeynes@66 | 185 | aica_write_channel( (reg >> 7) + 32, reg % 128, val );
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nkeynes@37 | 186 | // DEBUG( "AICA1 Write %08X => %08X", val, reg );
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nkeynes@11 | 187 | }
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nkeynes@11 | 188 |
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nkeynes@66 | 189 | /**
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nkeynes@66 | 190 | * AICA control registers
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nkeynes@66 | 191 | */
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nkeynes@11 | 192 | void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
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nkeynes@11 | 193 | {
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nkeynes@35 | 194 | uint32_t tmp;
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nkeynes@35 | 195 | switch( reg ) {
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nkeynes@35 | 196 | case AICA_RESET:
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nkeynes@35 | 197 | tmp = MMIO_READ( AICA2, AICA_RESET );
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nkeynes@37 | 198 | if( (tmp & 1) == 1 && (val & 1) == 0 ) {
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nkeynes@35 | 199 | /* ARM enabled - execute a core reset */
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nkeynes@37 | 200 | DEBUG( "ARM enabled" );
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nkeynes@35 | 201 | arm_reset();
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nkeynes@66 | 202 | samples_done = 0;
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nkeynes@66 | 203 | nanosecs_done = 0;
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nkeynes@37 | 204 | } else if( (tmp&1) == 0 && (val&1) == 1 ) {
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nkeynes@37 | 205 | DEBUG( "ARM disabled" );
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nkeynes@35 | 206 | }
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nkeynes@35 | 207 | MMIO_WRITE( AICA2, AICA_RESET, val );
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nkeynes@35 | 208 | break;
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nkeynes@61 | 209 | case AICA_IRQCLEAR:
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nkeynes@61 | 210 | aica_clear_event();
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nkeynes@61 | 211 | break;
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nkeynes@35 | 212 | default:
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nkeynes@35 | 213 | MMIO_WRITE( AICA2, reg, val );
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nkeynes@35 | 214 | break;
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nkeynes@35 | 215 | }
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nkeynes@11 | 216 | }
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nkeynes@66 | 217 |
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nkeynes@66 | 218 | /**
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nkeynes@66 | 219 | * Translate the channel frequency to a sample rate. The frequency is a
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nkeynes@66 | 220 | * 14-bit floating point number, where bits 0..9 is the mantissa,
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nkeynes@66 | 221 | * 11..14 is the signed exponent (-8 to +7). Bit 10 appears to
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nkeynes@66 | 222 | * be unused.
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nkeynes@66 | 223 | *
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nkeynes@66 | 224 | * @return sample rate in samples per second.
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nkeynes@66 | 225 | */
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nkeynes@66 | 226 | uint32_t aica_frequency_to_sample_rate( uint32_t freq )
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nkeynes@66 | 227 | {
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nkeynes@66 | 228 | uint32_t exponent = (freq & 0x3800) >> 11;
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nkeynes@66 | 229 | uint32_t mantissa = freq & 0x03FF;
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nkeynes@66 | 230 | if( freq & 0x4000 ) {
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nkeynes@66 | 231 | /* neg exponent - rate < 44100 */
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nkeynes@66 | 232 | exponent = 8 - exponent;
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nkeynes@66 | 233 | return (44100 >> exponent) +
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nkeynes@66 | 234 | ((44100 * mantissa) >> (10+exponent));
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nkeynes@66 | 235 | } else {
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nkeynes@66 | 236 | /* pos exponent - rate > 44100 */
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nkeynes@66 | 237 | return (44100 << exponent) +
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nkeynes@66 | 238 | ((44100 * mantissa) >> (10-exponent));
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nkeynes@66 | 239 | }
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nkeynes@66 | 240 | }
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nkeynes@66 | 241 |
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nkeynes@66 | 242 | void aica_write_channel( int channelNo, uint32_t reg, uint32_t val )
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nkeynes@66 | 243 | {
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nkeynes@66 | 244 | val &= 0x0000FFFF;
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nkeynes@66 | 245 | audio_channel_t channel = audio_get_channel(channelNo);
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nkeynes@66 | 246 | switch( reg ) {
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nkeynes@66 | 247 | case 0x00: /* Config + high address bits*/
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nkeynes@66 | 248 | channel->start = (channel->start & 0xFFFF) | ((val&0x1F) << 16);
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nkeynes@66 | 249 | if( val & 0x200 )
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nkeynes@73 | 250 | channel->loop = TRUE;
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nkeynes@66 | 251 | else
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nkeynes@73 | 252 | channel->loop = FALSE;
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nkeynes@66 | 253 | switch( (val >> 7) & 0x03 ) {
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nkeynes@66 | 254 | case 0:
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nkeynes@66 | 255 | channel->sample_format = AUDIO_FMT_16BIT;
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nkeynes@66 | 256 | break;
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nkeynes@66 | 257 | case 1:
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nkeynes@66 | 258 | channel->sample_format = AUDIO_FMT_8BIT;
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nkeynes@66 | 259 | break;
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nkeynes@66 | 260 | case 2:
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nkeynes@66 | 261 | case 3:
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nkeynes@66 | 262 | channel->sample_format = AUDIO_FMT_ADPCM;
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nkeynes@66 | 263 | break;
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nkeynes@66 | 264 | }
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nkeynes@66 | 265 | switch( (val >> 14) & 0x03 ) {
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nkeynes@66 | 266 | case 2:
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nkeynes@66 | 267 | audio_stop_channel( channelNo );
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nkeynes@66 | 268 | break;
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nkeynes@66 | 269 | case 3:
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nkeynes@66 | 270 | audio_start_channel( channelNo );
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nkeynes@66 | 271 | break;
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nkeynes@66 | 272 | default:
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nkeynes@66 | 273 | break;
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nkeynes@66 | 274 | /* Hrmm... */
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nkeynes@66 | 275 | }
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nkeynes@66 | 276 | break;
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nkeynes@66 | 277 | case 0x04: /* Low 16 address bits */
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nkeynes@66 | 278 | channel->start = (channel->start & 0x001F0000) | val;
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nkeynes@66 | 279 | break;
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nkeynes@66 | 280 | case 0x08: /* Loop start */
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nkeynes@66 | 281 | channel->loop_start = val;
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nkeynes@66 | 282 | break;
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nkeynes@73 | 283 | case 0x0C: /* End */
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nkeynes@73 | 284 | channel->end = val;
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nkeynes@66 | 285 | break;
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nkeynes@66 | 286 | case 0x10: /* Envelope register 1 */
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nkeynes@66 | 287 | break;
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nkeynes@66 | 288 | case 0x14: /* Envelope register 2 */
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nkeynes@66 | 289 | break;
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nkeynes@66 | 290 | case 0x18: /* Frequency */
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nkeynes@66 | 291 | channel->sample_rate = aica_frequency_to_sample_rate ( val );
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nkeynes@66 | 292 | break;
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nkeynes@66 | 293 | case 0x1C: /* ??? */
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nkeynes@66 | 294 | case 0x20: /* ??? */
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nkeynes@66 | 295 | case 0x24: /* Volume? /pan */
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nkeynes@66 | 296 | break;
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nkeynes@66 | 297 | case 0x28: /* Volume */
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nkeynes@66 | 298 | channel->vol_left = channel->vol_right = val & 0xFF;
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nkeynes@66 | 299 | break;
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nkeynes@66 | 300 | default: /* ??? */
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nkeynes@66 | 301 | break;
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nkeynes@66 | 302 | }
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nkeynes@66 | 303 |
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nkeynes@66 | 304 | }
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