filename | test/sh4/inc.s |
changeset | 555:309c97260912 |
prev | 357:3592a10b3242 |
author | nkeynes |
date | Fri Feb 08 00:06:56 2008 +0000 (16 years ago) |
permissions | -rw-r--r-- |
last change | Fix LDS/STS to FPUL/FPSCR to check the FPU disabled bit. Fixes the linux 2.4.0-test8 kernel boot (this wasn't exactly very well documented in the original manual) |
file | annotate | diff | log | raw |
nkeynes@226 | 1 | .altmacro |
nkeynes@226 | 2 | .macro fail name |
nkeynes@226 | 3 | LOCAL LC1 |
nkeynes@226 | 4 | LOCAL LC2 |
nkeynes@226 | 5 | add #1, r13 |
nkeynes@226 | 6 | mov.l LC1, r3 |
nkeynes@226 | 7 | mov r12, r5 |
nkeynes@226 | 8 | mov.l \name, r4 |
nkeynes@226 | 9 | xor r6, r6 |
nkeynes@226 | 10 | jsr @r3 |
nkeynes@226 | 11 | nop |
nkeynes@226 | 12 | bra LC2 |
nkeynes@226 | 13 | nop |
nkeynes@226 | 14 | .align 4 |
nkeynes@226 | 15 | LC1: |
nkeynes@226 | 16 | .long _test_print_failure |
nkeynes@226 | 17 | LC2: |
nkeynes@226 | 18 | .endm |
nkeynes@226 | 19 | |
nkeynes@226 | 20 | .macro failm name msg |
nkeynes@226 | 21 | LOCAL LC1 |
nkeynes@226 | 22 | LOCAL LC2 |
nkeynes@226 | 23 | add #1, r13 |
nkeynes@226 | 24 | mov.l LC1, r3 |
nkeynes@226 | 25 | mov r12, r5 |
nkeynes@226 | 26 | mov.l \name, r4 |
nkeynes@226 | 27 | mov.l \msg, r6 |
nkeynes@226 | 28 | jsr @r3 |
nkeynes@226 | 29 | nop |
nkeynes@226 | 30 | bra LC2 |
nkeynes@226 | 31 | nop |
nkeynes@226 | 32 | .align 4 |
nkeynes@226 | 33 | LC1: |
nkeynes@226 | 34 | .long _test_print_failure |
nkeynes@226 | 35 | LC2: |
nkeynes@226 | 36 | .endm |
nkeynes@226 | 37 | |
nkeynes@226 | 38 | |
nkeynes@226 | 39 | .macro start_test |
nkeynes@226 | 40 | mov.l r14, @-r15 |
nkeynes@226 | 41 | sts.l pr, @-r15 |
nkeynes@226 | 42 | mov.l r12, @-r15 |
nkeynes@226 | 43 | mov.l r13, @-r15 |
nkeynes@226 | 44 | mov r15, r14 |
nkeynes@226 | 45 | xor r12,r12 |
nkeynes@226 | 46 | xor r13,r13 |
nkeynes@226 | 47 | ! r12 is the test counter |
nkeynes@226 | 48 | ! r13 is the failed-test counter |
nkeynes@226 | 49 | .endm |
nkeynes@226 | 50 | |
nkeynes@226 | 51 | .macro end_test name |
nkeynes@226 | 52 | LOCAL test_print_result_k |
nkeynes@226 | 53 | mov.l \name, r4 |
nkeynes@226 | 54 | mov r13, r5 |
nkeynes@226 | 55 | mov r12, r6 |
nkeynes@226 | 56 | mov.l test_print_result_k, r3 |
nkeynes@226 | 57 | jsr @r3 |
nkeynes@226 | 58 | nop |
nkeynes@226 | 59 | mov r14, r15 |
nkeynes@226 | 60 | mov.l @r15+, r13 |
nkeynes@226 | 61 | mov.l @r15+, r12 |
nkeynes@226 | 62 | lds.l @r15+, pr |
nkeynes@226 | 63 | mov.l @r15+, r14 |
nkeynes@226 | 64 | rts |
nkeynes@226 | 65 | nop |
nkeynes@226 | 66 | .align 4 |
nkeynes@226 | 67 | test_print_result_k: |
nkeynes@226 | 68 | .long _test_print_result |
nkeynes@226 | 69 | .endm |
nkeynes@226 | 70 | |
nkeynes@226 | 71 | |
nkeynes@226 | 72 | .macro assert_t_set testname |
nkeynes@226 | 73 | LOCAL LC1 |
nkeynes@226 | 74 | LOCAL LC2 |
nkeynes@226 | 75 | LOCAL LCM |
nkeynes@226 | 76 | stc sr, r1 |
nkeynes@226 | 77 | mov.l r1, @-r15 |
nkeynes@226 | 78 | xor r0, r0 |
nkeynes@226 | 79 | add #1, r0 |
nkeynes@226 | 80 | and r0, r1 |
nkeynes@226 | 81 | cmp/eq r0, r1 |
nkeynes@226 | 82 | bt LC2 |
nkeynes@226 | 83 | add #1, r13 |
nkeynes@226 | 84 | mov.l LC1, r3 |
nkeynes@226 | 85 | mov r12, r5 |
nkeynes@226 | 86 | mov.l \testname, r4 |
nkeynes@226 | 87 | mov.l LCM, r6 |
nkeynes@226 | 88 | jsr @r3 |
nkeynes@226 | 89 | nop |
nkeynes@226 | 90 | bra LC2 |
nkeynes@226 | 91 | nop |
nkeynes@226 | 92 | .align 4 |
nkeynes@226 | 93 | LC1: |
nkeynes@226 | 94 | .long _test_print_failure |
nkeynes@226 | 95 | LCM: .long assert_t_clear_message |
nkeynes@226 | 96 | LC2: |
nkeynes@226 | 97 | mov.l @r15+, r1 |
nkeynes@226 | 98 | ldc r1, sr |
nkeynes@226 | 99 | .endm |
nkeynes@226 | 100 | |
nkeynes@226 | 101 | .macro assert_t_clear testname |
nkeynes@226 | 102 | LOCAL LC1 |
nkeynes@226 | 103 | LOCAL LC2 |
nkeynes@226 | 104 | LOCAL LCM |
nkeynes@226 | 105 | stc sr, r1 |
nkeynes@226 | 106 | mov.l r1, @-r15 |
nkeynes@226 | 107 | xor r0, r0 |
nkeynes@226 | 108 | add #1, r0 |
nkeynes@226 | 109 | and r0, r1 |
nkeynes@226 | 110 | cmp/eq r0, r1 |
nkeynes@226 | 111 | bf LC2 |
nkeynes@226 | 112 | add #1, r13 |
nkeynes@226 | 113 | mov.l LC1, r3 |
nkeynes@226 | 114 | mov r12, r5 |
nkeynes@226 | 115 | mov.l \testname, r4 |
nkeynes@226 | 116 | mov.l LCM, r6 |
nkeynes@226 | 117 | jsr @r3 |
nkeynes@226 | 118 | nop |
nkeynes@226 | 119 | bra LC2 |
nkeynes@226 | 120 | nop |
nkeynes@226 | 121 | .align 4 |
nkeynes@226 | 122 | LC1: |
nkeynes@226 | 123 | .long _test_print_failure |
nkeynes@226 | 124 | LCM: .long assert_t_clear_message |
nkeynes@226 | 125 | LC2: |
nkeynes@226 | 126 | mov.l @r15+, r1 |
nkeynes@226 | 127 | ldc r1, sr |
nkeynes@226 | 128 | .endm |
nkeynes@226 | 129 | |
nkeynes@226 | 130 | ! Note that yes there is a perfectly good clrt instruction, but we try to |
nkeynes@226 | 131 | ! minimize the number of instructions we depend on here. |
nkeynes@226 | 132 | |
nkeynes@226 | 133 | .macro clc |
nkeynes@226 | 134 | xor r0, r0 |
nkeynes@226 | 135 | addc r0, r0 |
nkeynes@226 | 136 | .endm |
nkeynes@226 | 137 | .macro setc |
nkeynes@226 | 138 | xor r0, r0 |
nkeynes@226 | 139 | not r0, r0 |
nkeynes@226 | 140 | addc r0, r0 |
nkeynes@226 | 141 | .endm |
nkeynes@226 | 142 | |
nkeynes@233 | 143 | ! Switch to user-mode |
nkeynes@233 | 144 | .macro usermode |
nkeynes@233 | 145 | stc sr, r0 |
nkeynes@233 | 146 | mov #64, r1 |
nkeynes@233 | 147 | mov #24, r2 |
nkeynes@233 | 148 | shld r2, r1 |
nkeynes@233 | 149 | not r1, r1 |
nkeynes@233 | 150 | and r0, r1 |
nkeynes@233 | 151 | ldc r1, sr |
nkeynes@233 | 152 | .endm |
nkeynes@233 | 153 | |
nkeynes@233 | 154 | ! Switch to system-mode |
nkeynes@233 | 155 | ! NB: implemented as a trap to the interrupt handler, as obviously |
nkeynes@233 | 156 | ! we can't just update SR... |
nkeynes@233 | 157 | .macro systemmode |
nkeynes@233 | 158 | trapa #42 |
nkeynes@233 | 159 | nop |
nkeynes@233 | 160 | .endm |
nkeynes@233 | 161 | |
nkeynes@228 | 162 | .macro clearbl |
nkeynes@228 | 163 | LOCAL L1 |
nkeynes@228 | 164 | LOCAL L2 |
nkeynes@228 | 165 | mov.l L1, r0 |
nkeynes@228 | 166 | stc sr, r1 |
nkeynes@228 | 167 | and r0, r1 |
nkeynes@228 | 168 | ldc r1, sr |
nkeynes@228 | 169 | bra L2 |
nkeynes@228 | 170 | nop |
nkeynes@228 | 171 | .align 4 |
nkeynes@228 | 172 | L1: .long 0xEFFFFFFF |
nkeynes@228 | 173 | L2: |
nkeynes@228 | 174 | .endm |
nkeynes@228 | 175 | |
nkeynes@228 | 176 | .macro setbl |
nkeynes@228 | 177 | LOCAL L1 |
nkeynes@228 | 178 | LOCAL L2 |
nkeynes@228 | 179 | xor r0, r0 |
nkeynes@228 | 180 | add #1, r0 |
nkeynes@228 | 181 | shll r0, 28 |
nkeynes@228 | 182 | stc sr, r1 |
nkeynes@228 | 183 | or r0, r1 |
nkeynes@228 | 184 | ldc r1, sr |
nkeynes@228 | 185 | bra L2 |
nkeynes@228 | 186 | nop |
nkeynes@228 | 187 | .align 4 |
nkeynes@228 | 188 | L1: .long 0x10000000 |
nkeynes@228 | 189 | L2: |
nkeynes@228 | 190 | .endm |
nkeynes@228 | 191 | |
nkeynes@357 | 192 | .macro setpr |
nkeynes@357 | 193 | sts fpscr, r0 |
nkeynes@357 | 194 | xor r1, r1 |
nkeynes@357 | 195 | add #8, r1 |
nkeynes@357 | 196 | shll16 r1 |
nkeynes@357 | 197 | or r1, r0 |
nkeynes@357 | 198 | lds r0, fpscr |
nkeynes@357 | 199 | .endm |
nkeynes@357 | 200 | |
nkeynes@357 | 201 | .macro clrpr |
nkeynes@357 | 202 | sts fpscr, r0 |
nkeynes@357 | 203 | xor r1, r1 |
nkeynes@357 | 204 | add #8, r1 |
nkeynes@357 | 205 | shll16 r1 |
nkeynes@357 | 206 | not r1, r1 |
nkeynes@357 | 207 | and r1, r0 |
nkeynes@357 | 208 | lds r0, fpscr |
nkeynes@357 | 209 | .endm |
nkeynes@357 | 210 | |
nkeynes@228 | 211 | .macro expect_exc code |
nkeynes@228 | 212 | LOCAL L1, L2, L3 |
nkeynes@228 | 213 | mov.l L1, r3 |
nkeynes@228 | 214 | mov.l L2, r4 |
nkeynes@228 | 215 | jsr @r3 |
nkeynes@228 | 216 | nop |
nkeynes@228 | 217 | bra L3 |
nkeynes@228 | 218 | nop |
nkeynes@228 | 219 | .align 4 |
nkeynes@228 | 220 | L1: .long _expect_exception |
nkeynes@228 | 221 | L2: .long \code |
nkeynes@228 | 222 | L3: |
nkeynes@228 | 223 | |
nkeynes@228 | 224 | .endm |
nkeynes@228 | 225 | |
nkeynes@228 | 226 | .macro assert_exc_caught testname, expectpc |
nkeynes@231 | 227 | LOCAL L1, L2, L3 |
nkeynes@228 | 228 | mov.l L1, r3 |
nkeynes@228 | 229 | mov.l \testname, r4 |
nkeynes@228 | 230 | mov r12, r5 |
nkeynes@228 | 231 | mov.l L2, r6 |
nkeynes@228 | 232 | jsr @r3 |
nkeynes@228 | 233 | nop |
nkeynes@228 | 234 | add r0, r13 |
nkeynes@228 | 235 | bra L3 |
nkeynes@228 | 236 | nop |
nkeynes@228 | 237 | .align 4 |
nkeynes@228 | 238 | L1: .long _assert_exception_caught |
nkeynes@228 | 239 | L2: .long \expectpc |
nkeynes@228 | 240 | L3: |
nkeynes@228 | 241 | .endm |
nkeynes@226 | 242 | |
nkeynes@555 | 243 | .macro assert_tlb_exc_caught testname, expectpc, expectvpn |
nkeynes@555 | 244 | LOCAL L1, L2, L3 |
nkeynes@555 | 245 | mov.l L1, r3 |
nkeynes@555 | 246 | mov.l \testname, r4 |
nkeynes@555 | 247 | mov r12, r5 |
nkeynes@555 | 248 | mov.l L2, r6 |
nkeynes@555 | 249 | mov.l \expectvpn, r7 |
nkeynes@555 | 250 | jsr @r3 |
nkeynes@555 | 251 | nop |
nkeynes@555 | 252 | add r0, r13 |
nkeynes@555 | 253 | bra L3 |
nkeynes@555 | 254 | nop |
nkeynes@555 | 255 | .align 4 |
nkeynes@555 | 256 | L1: .long _assert_exception_caught |
nkeynes@555 | 257 | L2: .long \expectpc |
nkeynes@555 | 258 | L3: |
nkeynes@555 | 259 | .endm |
nkeynes@555 | 260 | |
nkeynes@226 | 261 | .align 2 |
nkeynes@226 | 262 | assert_t_set_message: |
nkeynes@226 | 263 | .string "Expected T=1 but was 0" |
nkeynes@226 | 264 | |
nkeynes@226 | 265 | assert_t_clear_message: |
nkeynes@226 | 266 | .string "Expected T=0 but was 1" |
nkeynes@226 | 267 |
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