filename | src/pvr2/pvr2.h |
changeset | 315:2d8ba198d62c |
prev | 310:00cd8897ad5e |
next | 319:5392aed6a982 |
author | nkeynes |
date | Tue Jan 23 11:19:32 2007 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Refactor render buffer read/write to pvr2mem.c Implement 4-bit indexed textures (tentatively) Fix RGB24 support |
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nkeynes@31 | 1 | /** |
nkeynes@315 | 2 | * $Id: pvr2.h,v 1.25 2007-01-23 11:19:32 nkeynes Exp $ |
nkeynes@31 | 3 | * |
nkeynes@103 | 4 | * PVR2 (video chip) functions and macros. |
nkeynes@31 | 5 | * |
nkeynes@31 | 6 | * Copyright (c) 2005 Nathan Keynes. |
nkeynes@31 | 7 | * |
nkeynes@31 | 8 | * This program is free software; you can redistribute it and/or modify |
nkeynes@31 | 9 | * it under the terms of the GNU General Public License as published by |
nkeynes@31 | 10 | * the Free Software Foundation; either version 2 of the License, or |
nkeynes@31 | 11 | * (at your option) any later version. |
nkeynes@31 | 12 | * |
nkeynes@31 | 13 | * This program is distributed in the hope that it will be useful, |
nkeynes@31 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
nkeynes@31 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
nkeynes@31 | 16 | * GNU General Public License for more details. |
nkeynes@31 | 17 | */ |
nkeynes@31 | 18 | |
nkeynes@103 | 19 | #include "dream.h" |
nkeynes@103 | 20 | #include "mem.h" |
nkeynes@144 | 21 | #include "display.h" |
nkeynes@103 | 22 | #include "pvr2/pvr2mmio.h" |
nkeynes@103 | 23 | #include <GL/gl.h> |
nkeynes@1 | 24 | |
nkeynes@189 | 25 | typedef unsigned int pvraddr_t; |
nkeynes@189 | 26 | typedef unsigned int pvr64addr_t; |
nkeynes@1 | 27 | |
nkeynes@1 | 28 | #define DISPMODE_DE 0x00000001 /* Display enable */ |
nkeynes@1 | 29 | #define DISPMODE_SD 0x00000002 /* Scan double */ |
nkeynes@1 | 30 | #define DISPMODE_COL 0x0000000C /* Colour mode */ |
nkeynes@1 | 31 | #define DISPMODE_CD 0x08000000 /* Clock double */ |
nkeynes@1 | 32 | |
nkeynes@94 | 33 | #define COLFMT_RGB15 0x00000000 |
nkeynes@94 | 34 | #define COLFMT_RGB16 0x00000004 |
nkeynes@94 | 35 | #define COLFMT_RGB24 0x00000008 |
nkeynes@94 | 36 | #define COLFMT_RGB32 0x0000000C |
nkeynes@1 | 37 | |
nkeynes@1 | 38 | #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/ |
nkeynes@1 | 39 | #define DISPSIZE_LPF 0x000FFC00 /* lines per field */ |
nkeynes@1 | 40 | #define DISPSIZE_PPL 0x000003FF /* pixel words (32 bit) per line */ |
nkeynes@1 | 41 | |
nkeynes@103 | 42 | #define DISPCFG_VP 0x00000001 /* V-sync polarity */ |
nkeynes@103 | 43 | #define DISPCFG_HP 0x00000002 /* H-sync polarity */ |
nkeynes@103 | 44 | #define DISPCFG_I 0x00000010 /* Interlace enable */ |
nkeynes@103 | 45 | #define DISPCFG_BS 0x000000C0 /* Broadcast standard */ |
nkeynes@103 | 46 | #define DISPCFG_VO 0x00000100 /* Video output enable */ |
nkeynes@1 | 47 | |
nkeynes@1 | 48 | #define BS_NTSC 0x00000000 |
nkeynes@1 | 49 | #define BS_PAL 0x00000040 |
nkeynes@1 | 50 | #define BS_PALM 0x00000080 /* ? */ |
nkeynes@1 | 51 | #define BS_PALN 0x000000C0 /* ? */ |
nkeynes@1 | 52 | |
nkeynes@103 | 53 | #define PVR2_RAM_BASE 0x05000000 |
nkeynes@103 | 54 | #define PVR2_RAM_BASE_INT 0x04000000 |
nkeynes@103 | 55 | #define PVR2_RAM_SIZE (8 * 1024 * 1024) |
nkeynes@103 | 56 | #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12) |
nkeynes@189 | 57 | #define PVR2_RAM_MASK 0x7FFFFF |
nkeynes@103 | 58 | |
nkeynes@222 | 59 | #define RENDER_ZONLY 0 |
nkeynes@222 | 60 | #define RENDER_NORMAL 1 /* Render non-modified polygons */ |
nkeynes@222 | 61 | #define RENDER_CHEAPMOD 2 /* Render cheap-modified polygons */ |
nkeynes@222 | 62 | #define RENDER_FULLMOD 3 /* Render the fully-modified version of the polygons */ |
nkeynes@222 | 63 | |
nkeynes@1 | 64 | void pvr2_next_frame( void ); |
nkeynes@19 | 65 | void pvr2_set_base_address( uint32_t ); |
nkeynes@133 | 66 | int pvr2_get_frame_count( void ); |
nkeynes@295 | 67 | gboolean pvr2_save_next_scene( const gchar *filename ); |
nkeynes@56 | 68 | |
nkeynes@103 | 69 | #define PVR2_CMD_END_OF_LIST 0x00 |
nkeynes@103 | 70 | #define PVR2_CMD_USER_CLIP 0x20 |
nkeynes@103 | 71 | #define PVR2_CMD_POLY_OPAQUE 0x80 |
nkeynes@103 | 72 | #define PVR2_CMD_MOD_OPAQUE 0x81 |
nkeynes@103 | 73 | #define PVR2_CMD_POLY_TRANS 0x82 |
nkeynes@103 | 74 | #define PVR2_CMD_MOD_TRANS 0x83 |
nkeynes@103 | 75 | #define PVR2_CMD_POLY_PUNCHOUT 0x84 |
nkeynes@103 | 76 | #define PVR2_CMD_VERTEX 0xE0 |
nkeynes@103 | 77 | #define PVR2_CMD_VERTEX_LAST 0xF0 |
nkeynes@103 | 78 | |
nkeynes@103 | 79 | #define PVR2_POLY_TEXTURED 0x00000008 |
nkeynes@103 | 80 | #define PVR2_POLY_SPECULAR 0x00000004 |
nkeynes@103 | 81 | #define PVR2_POLY_SHADED 0x00000002 |
nkeynes@103 | 82 | #define PVR2_POLY_UV_16BIT 0x00000001 |
nkeynes@103 | 83 | |
nkeynes@133 | 84 | #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000 |
nkeynes@133 | 85 | #define PVR2_POLY_MODE_ALPHA 0x00100000 |
nkeynes@133 | 86 | #define PVR2_POLY_MODE_TEXALPHA 0x00080000 |
nkeynes@133 | 87 | #define PVR2_POLY_MODE_FLIP_S 0x00040000 |
nkeynes@133 | 88 | #define PVR2_POLY_MODE_FLIP_T 0x00020000 |
nkeynes@133 | 89 | #define PVR2_POLY_MODE_CLAMP_S 0x00010000 |
nkeynes@133 | 90 | #define PVR2_POLY_MODE_CLAMP_T 0x00008000 |
nkeynes@133 | 91 | |
nkeynes@103 | 92 | #define PVR2_TEX_FORMAT_ARGB1555 0x00000000 |
nkeynes@103 | 93 | #define PVR2_TEX_FORMAT_RGB565 0x08000000 |
nkeynes@103 | 94 | #define PVR2_TEX_FORMAT_ARGB4444 0x10000000 |
nkeynes@103 | 95 | #define PVR2_TEX_FORMAT_YUV422 0x18000000 |
nkeynes@103 | 96 | #define PVR2_TEX_FORMAT_BUMPMAP 0x20000000 |
nkeynes@103 | 97 | #define PVR2_TEX_FORMAT_IDX4 0x28000000 |
nkeynes@103 | 98 | #define PVR2_TEX_FORMAT_IDX8 0x30000000 |
nkeynes@103 | 99 | |
nkeynes@103 | 100 | #define PVR2_TEX_MIPMAP 0x80000000 |
nkeynes@103 | 101 | #define PVR2_TEX_COMPRESSED 0x40000000 |
nkeynes@103 | 102 | #define PVR2_TEX_FORMAT_MASK 0x38000000 |
nkeynes@103 | 103 | #define PVR2_TEX_UNTWIDDLED 0x04000000 |
nkeynes@284 | 104 | #define PVR2_TEX_STRIDE 0x02000000 |
nkeynes@103 | 105 | |
nkeynes@108 | 106 | #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 ); |
nkeynes@103 | 107 | #define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP ) |
nkeynes@103 | 108 | #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED ) |
nkeynes@103 | 109 | #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0) |
nkeynes@284 | 110 | #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000) |
nkeynes@103 | 111 | |
nkeynes@103 | 112 | /****************************** Frame Buffer *****************************/ |
nkeynes@103 | 113 | |
nkeynes@103 | 114 | /** |
nkeynes@103 | 115 | * Write to the interleaved memory address space (aka 64-bit address space). |
nkeynes@103 | 116 | */ |
nkeynes@103 | 117 | void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length ); |
nkeynes@103 | 118 | |
nkeynes@103 | 119 | /** |
nkeynes@282 | 120 | * Write to the interleaved memory address space (aka 64-bit address space), |
nkeynes@282 | 121 | * using a line length and stride. |
nkeynes@282 | 122 | */ |
nkeynes@282 | 123 | void pvr2_vram64_write_stride( sh4addr_t dest, char *src, uint32_t line_bytes, |
nkeynes@282 | 124 | uint32_t line_stride_bytes, uint32_t line_count ); |
nkeynes@282 | 125 | |
nkeynes@282 | 126 | /** |
nkeynes@103 | 127 | * Read from the interleaved memory address space (aka 64-bit address space) |
nkeynes@103 | 128 | */ |
nkeynes@103 | 129 | void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length ); |
nkeynes@103 | 130 | |
nkeynes@127 | 131 | /** |
nkeynes@310 | 132 | * Read a twiddled image from interleaved memory address space (aka 64-bit address |
nkeynes@310 | 133 | * space), writing the image to the destination buffer in detwiddled format. |
nkeynes@310 | 134 | * Width and height must be powers of 2 |
nkeynes@315 | 135 | * This version reads 4-bit pixels. |
nkeynes@315 | 136 | */ |
nkeynes@315 | 137 | void pvr2_vram64_read_twiddled_4( char *dest, sh4addr_t src, uint32_t width, uint32_t height ); |
nkeynes@315 | 138 | |
nkeynes@315 | 139 | |
nkeynes@315 | 140 | /** |
nkeynes@315 | 141 | * Read a twiddled image from interleaved memory address space (aka 64-bit address |
nkeynes@315 | 142 | * space), writing the image to the destination buffer in detwiddled format. |
nkeynes@315 | 143 | * Width and height must be powers of 2 |
nkeynes@310 | 144 | * This version reads 8-bit pixels. |
nkeynes@310 | 145 | */ |
nkeynes@310 | 146 | void pvr2_vram64_read_twiddled_8( char *dest, sh4addr_t src, uint32_t width, uint32_t height ); |
nkeynes@310 | 147 | |
nkeynes@310 | 148 | /** |
nkeynes@310 | 149 | * Read a twiddled image from interleaved memory address space (aka 64-bit address |
nkeynes@310 | 150 | * space), writing the image to the destination buffer in detwiddled format. |
nkeynes@310 | 151 | * Width and height must be powers of 2, and src must be 16-bit aligned. |
nkeynes@310 | 152 | * This version reads 16-bit pixels. |
nkeynes@310 | 153 | */ |
nkeynes@310 | 154 | void pvr2_vram64_read_twiddled_16( char *dest, sh4addr_t src, uint32_t width, uint32_t height ); |
nkeynes@310 | 155 | |
nkeynes@310 | 156 | /** |
nkeynes@284 | 157 | * Read an image from the interleaved memory address space (aka 64-bit address space) |
nkeynes@284 | 158 | * where the source and destination line sizes may differ. Note that both byte |
nkeynes@284 | 159 | * counts must be a multiple of 4, and the src address must be 32-bit aligned. |
nkeynes@284 | 160 | */ |
nkeynes@292 | 161 | void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr, |
nkeynes@292 | 162 | uint32_t src_line_bytes, uint32_t line_count ); |
nkeynes@284 | 163 | /** |
nkeynes@127 | 164 | * Dump a portion of vram to a stream from the interleaved memory address |
nkeynes@127 | 165 | * space. |
nkeynes@127 | 166 | */ |
nkeynes@127 | 167 | void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f ); |
nkeynes@127 | 168 | |
nkeynes@315 | 169 | |
nkeynes@315 | 170 | /** |
nkeynes@315 | 171 | * Describes a rendering buffer that's actually held in GL, for when we need |
nkeynes@315 | 172 | * to fetch the bits back to vram. |
nkeynes@315 | 173 | */ |
nkeynes@315 | 174 | typedef struct pvr2_render_buffer { |
nkeynes@315 | 175 | sh4addr_t render_addr; /* The actual address rendered to in pvr ram */ |
nkeynes@315 | 176 | uint32_t size; /* Length of rendering region in bytes */ |
nkeynes@315 | 177 | int width, height; |
nkeynes@315 | 178 | int colour_format; |
nkeynes@315 | 179 | } *pvr2_render_buffer_t; |
nkeynes@315 | 180 | |
nkeynes@315 | 181 | /** |
nkeynes@315 | 182 | * Flush the indicated render buffer back to PVR. Caller is responsible for |
nkeynes@315 | 183 | * tracking whether there is actually anything in the buffer. |
nkeynes@315 | 184 | * |
nkeynes@315 | 185 | * @param buffer A render buffer indicating the address to store to, and the |
nkeynes@315 | 186 | * format the data needs to be in. |
nkeynes@315 | 187 | * @param backBuffer TRUE to flush the back buffer, FALSE for |
nkeynes@315 | 188 | * the front buffer. |
nkeynes@315 | 189 | */ |
nkeynes@315 | 190 | void pvr2_render_buffer_copy_to_sh4( pvr2_render_buffer_t buffer, |
nkeynes@315 | 191 | gboolean backBuffer ); |
nkeynes@315 | 192 | |
nkeynes@315 | 193 | /** |
nkeynes@315 | 194 | * Copy data from PVR ram into the GL render buffer. |
nkeynes@315 | 195 | * |
nkeynes@315 | 196 | * @param buffer A render buffer indicating the address to read from, and the |
nkeynes@315 | 197 | * format the data is in. |
nkeynes@315 | 198 | * @param backBuffer TRUE to write the back buffer, FALSE for |
nkeynes@315 | 199 | * the front buffer. |
nkeynes@315 | 200 | */ |
nkeynes@315 | 201 | void pvr2_render_buffer_copy_from_sh4( pvr2_render_buffer_t buffer, |
nkeynes@315 | 202 | gboolean backBuffer ); |
nkeynes@315 | 203 | |
nkeynes@315 | 204 | |
nkeynes@315 | 205 | /** |
nkeynes@315 | 206 | * Invalidate any caching on the supplied SH4 address |
nkeynes@315 | 207 | */ |
nkeynes@315 | 208 | gboolean pvr2_render_buffer_invalidate( sh4addr_t addr ); |
nkeynes@315 | 209 | |
nkeynes@315 | 210 | |
nkeynes@315 | 211 | |
nkeynes@103 | 212 | /**************************** Tile Accelerator ***************************/ |
nkeynes@56 | 213 | /** |
nkeynes@56 | 214 | * Process the data in the supplied buffer as an array of TA command lists. |
nkeynes@56 | 215 | * Any excess bytes are held pending until a complete list is sent |
nkeynes@56 | 216 | */ |
nkeynes@100 | 217 | void pvr2_ta_write( char *buf, uint32_t length ); |
nkeynes@100 | 218 | |
nkeynes@100 | 219 | |
nkeynes@103 | 220 | /** |
nkeynes@103 | 221 | * (Re)initialize the tile accelerator in preparation for the next scene. |
nkeynes@103 | 222 | * Normally called immediately before commencing polygon transmission. |
nkeynes@103 | 223 | */ |
nkeynes@103 | 224 | void pvr2_ta_init( void ); |
nkeynes@103 | 225 | |
nkeynes@282 | 226 | |
nkeynes@282 | 227 | /****************************** YUV Converter ****************************/ |
nkeynes@282 | 228 | |
nkeynes@282 | 229 | /** |
nkeynes@282 | 230 | * Process a block of YUV data. |
nkeynes@282 | 231 | */ |
nkeynes@282 | 232 | void pvr2_yuv_write( char *buf, uint32_t length ); |
nkeynes@282 | 233 | |
nkeynes@282 | 234 | /** |
nkeynes@282 | 235 | * Initialize the YUV converter. |
nkeynes@282 | 236 | */ |
nkeynes@284 | 237 | void pvr2_yuv_init( uint32_t target_addr ); |
nkeynes@284 | 238 | |
nkeynes@284 | 239 | void pvr2_yuv_set_config( uint32_t config ); |
nkeynes@282 | 240 | |
nkeynes@103 | 241 | /********************************* Renderer ******************************/ |
nkeynes@103 | 242 | |
nkeynes@103 | 243 | /** |
nkeynes@103 | 244 | * Initialize the rendering pipeline. |
nkeynes@103 | 245 | * @return TRUE on success, FALSE on failure. |
nkeynes@103 | 246 | */ |
nkeynes@103 | 247 | gboolean pvr2_render_init( void ); |
nkeynes@103 | 248 | |
nkeynes@103 | 249 | /** |
nkeynes@103 | 250 | * Render the current scene stored in PVR ram to the GL back buffer. |
nkeynes@103 | 251 | */ |
nkeynes@100 | 252 | void pvr2_render_scene( void ); |
nkeynes@103 | 253 | |
nkeynes@103 | 254 | /** |
nkeynes@103 | 255 | * Display the scene rendered to the supplied address. |
nkeynes@103 | 256 | * @return TRUE if there was an available render that was displayed, |
nkeynes@103 | 257 | * otherwise FALSE (and no action was taken) |
nkeynes@103 | 258 | */ |
nkeynes@103 | 259 | gboolean pvr2_render_display_frame( uint32_t address ); |
nkeynes@103 | 260 | |
nkeynes@219 | 261 | |
nkeynes@219 | 262 | void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode ); |
nkeynes@219 | 263 | |
nkeynes@219 | 264 | void render_set_context( uint32_t *context, int render_mode ); |
nkeynes@219 | 265 | |
nkeynes@219 | 266 | void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1, |
nkeynes@219 | 267 | int clipx2, int clipy2 ); |
nkeynes@219 | 268 | |
nkeynes@103 | 269 | /****************************** Texture Cache ****************************/ |
nkeynes@103 | 270 | |
nkeynes@103 | 271 | /** |
nkeynes@108 | 272 | * Initialize the texture cache. |
nkeynes@103 | 273 | */ |
nkeynes@103 | 274 | void texcache_init( void ); |
nkeynes@103 | 275 | |
nkeynes@108 | 276 | /** |
nkeynes@108 | 277 | * Initialize the GL side of the texture cache (texture ids and such). |
nkeynes@108 | 278 | */ |
nkeynes@108 | 279 | void texcache_gl_init( void ); |
nkeynes@103 | 280 | |
nkeynes@103 | 281 | /** |
nkeynes@103 | 282 | * Flush all textures and delete. The cache will be non-functional until |
nkeynes@103 | 283 | * the next call to texcache_init(). This would typically be done if |
nkeynes@103 | 284 | * switching GL targets. |
nkeynes@103 | 285 | */ |
nkeynes@103 | 286 | void texcache_shutdown( void ); |
nkeynes@103 | 287 | |
nkeynes@103 | 288 | /** |
nkeynes@103 | 289 | * Evict all textures contained in the page identified by a texture address. |
nkeynes@103 | 290 | */ |
nkeynes@103 | 291 | void texcache_invalidate_page( uint32_t texture_addr ); |
nkeynes@103 | 292 | |
nkeynes@103 | 293 | /** |
nkeynes@103 | 294 | * Return a texture ID for the texture specified at the supplied address |
nkeynes@103 | 295 | * and given parameters (the same sequence of bytes could in theory have |
nkeynes@103 | 296 | * multiple interpretations). We use the texture address as the primary |
nkeynes@103 | 297 | * index, but allow for multiple instances at each address. The texture |
nkeynes@103 | 298 | * will be bound to the GL_TEXTURE_2D target before being returned. |
nkeynes@103 | 299 | * |
nkeynes@103 | 300 | * If the texture has already been bound, return the ID to which it was |
nkeynes@103 | 301 | * bound. Otherwise obtain an unused texture ID and set it up appropriately. |
nkeynes@103 | 302 | */ |
nkeynes@103 | 303 | GLuint texcache_get_texture( uint32_t texture_addr, int width, int height, |
nkeynes@103 | 304 | int mode ); |
nkeynes@221 | 305 | |
nkeynes@221 | 306 | /************************* Rendering support macros **************************/ |
nkeynes@221 | 307 | #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] ) |
nkeynes@221 | 308 | #define POLY1_DEPTH_ENABLE(poly1) (((poly1)&0x04000000) == 0 ) |
nkeynes@221 | 309 | #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03) |
nkeynes@221 | 310 | #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000)) |
nkeynes@221 | 311 | #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000)) |
nkeynes@221 | 312 | #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT) |
nkeynes@221 | 313 | #define POLY1_UV16(poly1) (((poly1)&0x00400000)) |
nkeynes@221 | 314 | #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000)) |
nkeynes@221 | 315 | |
nkeynes@221 | 316 | #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] ) |
nkeynes@221 | 317 | #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] ) |
nkeynes@282 | 318 | #define POLY2_SRC_BLEND_TARGET(poly2) ((poly2)&0x02000000) |
nkeynes@282 | 319 | #define POLY2_DEST_BLEND_TARGET(poly2) ((poly2)&0x01000000) |
nkeynes@221 | 320 | #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000) |
nkeynes@221 | 321 | #define POLY2_ALPHA_ENABLE(poly2) ((poly2)&0x001000000) |
nkeynes@221 | 322 | #define POLY2_TEX_ALPHA_ENABLE(poly2) (((poly2)&0x00080000) == 0 ) |
nkeynes@308 | 323 | #define POLY2_TEX_CLAMP_U(poly2) ((poly2)&0x00010000) |
nkeynes@308 | 324 | #define POLY2_TEX_CLAMP_V(poly2) ((poly2)&0x00008000) |
nkeynes@221 | 325 | #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) ) |
nkeynes@221 | 326 | #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) ) |
nkeynes@221 | 327 | #define POLY2_TEX_BLEND(poly2) ( pvr2_poly_texblend[((poly2) >> 6)&0x03] ) |
nkeynes@221 | 328 | extern int pvr2_poly_depthmode[8]; |
nkeynes@221 | 329 | extern int pvr2_poly_srcblend[8]; |
nkeynes@221 | 330 | extern int pvr2_poly_dstblend[8]; |
nkeynes@221 | 331 | extern int pvr2_poly_texblend[4]; |
nkeynes@221 | 332 | extern int pvr2_render_colour_format[8]; |
nkeynes@221 | 333 | |
nkeynes@221 | 334 | float halftofloat(uint16_t half); |
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