nkeynes@359 | 1 | /**
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nkeynes@586 | 2 | * $Id$
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nkeynes@359 | 3 | *
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nkeynes@359 | 4 | * SH4 emulation core, and parent module for all the SH4 peripheral
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nkeynes@359 | 5 | * modules.
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nkeynes@359 | 6 | *
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nkeynes@359 | 7 | * Copyright (c) 2005 Nathan Keynes.
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nkeynes@359 | 8 | *
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nkeynes@359 | 9 | * This program is free software; you can redistribute it and/or modify
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nkeynes@359 | 10 | * it under the terms of the GNU General Public License as published by
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nkeynes@359 | 11 | * the Free Software Foundation; either version 2 of the License, or
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nkeynes@359 | 12 | * (at your option) any later version.
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nkeynes@359 | 13 | *
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nkeynes@359 | 14 | * This program is distributed in the hope that it will be useful,
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nkeynes@359 | 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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nkeynes@359 | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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nkeynes@359 | 17 | * GNU General Public License for more details.
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nkeynes@359 | 18 | */
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nkeynes@359 | 19 |
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nkeynes@359 | 20 | #define MODULE sh4_module
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nkeynes@586 | 21 | #include <assert.h>
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nkeynes@359 | 22 | #include <math.h>
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nkeynes@359 | 23 | #include "dream.h"
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nkeynes@430 | 24 | #include "dreamcast.h"
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nkeynes@430 | 25 | #include "eventq.h"
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nkeynes@430 | 26 | #include "mem.h"
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nkeynes@430 | 27 | #include "clock.h"
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nkeynes@430 | 28 | #include "syscall.h"
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nkeynes@359 | 29 | #include "sh4/sh4core.h"
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nkeynes@359 | 30 | #include "sh4/sh4mmio.h"
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nkeynes@671 | 31 | #include "sh4/sh4stat.h"
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nkeynes@945 | 32 | #include "sh4/mmu.h"
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nkeynes@359 | 33 |
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nkeynes@359 | 34 | #define SH4_CALLTRACE 1
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nkeynes@359 | 35 |
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nkeynes@359 | 36 | #define MAX_INT 0x7FFFFFFF
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nkeynes@359 | 37 | #define MIN_INT 0x80000000
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nkeynes@359 | 38 | #define MAX_INTF 2147483647.0
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nkeynes@359 | 39 | #define MIN_INTF -2147483648.0
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nkeynes@359 | 40 |
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nkeynes@359 | 41 | /********************** SH4 Module Definition ****************************/
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nkeynes@359 | 42 |
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nkeynes@740 | 43 | uint32_t sh4_emulate_run_slice( uint32_t nanosecs )
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nkeynes@359 | 44 | {
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nkeynes@359 | 45 | int i;
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nkeynes@359 | 46 |
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nkeynes@359 | 47 | if( sh4_breakpoint_count == 0 ) {
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nkeynes@359 | 48 | for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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nkeynes@359 | 49 | if( SH4_EVENT_PENDING() ) {
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nkeynes@359 | 50 | if( sh4r.event_types & PENDING_EVENT ) {
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nkeynes@359 | 51 | event_execute();
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nkeynes@359 | 52 | }
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nkeynes@359 | 53 | /* Eventq execute may (quite likely) deliver an immediate IRQ */
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nkeynes@359 | 54 | if( sh4r.event_types & PENDING_IRQ ) {
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nkeynes@359 | 55 | sh4_accept_interrupt();
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nkeynes@359 | 56 | }
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nkeynes@359 | 57 | }
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nkeynes@359 | 58 | if( !sh4_execute_instruction() ) {
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nkeynes@359 | 59 | break;
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nkeynes@359 | 60 | }
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nkeynes@359 | 61 | }
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nkeynes@359 | 62 | } else {
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nkeynes@359 | 63 | for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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nkeynes@359 | 64 | if( SH4_EVENT_PENDING() ) {
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nkeynes@359 | 65 | if( sh4r.event_types & PENDING_EVENT ) {
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nkeynes@359 | 66 | event_execute();
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nkeynes@359 | 67 | }
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nkeynes@359 | 68 | /* Eventq execute may (quite likely) deliver an immediate IRQ */
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nkeynes@359 | 69 | if( sh4r.event_types & PENDING_IRQ ) {
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nkeynes@359 | 70 | sh4_accept_interrupt();
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nkeynes@359 | 71 | }
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nkeynes@359 | 72 | }
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nkeynes@359 | 73 |
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nkeynes@359 | 74 | if( !sh4_execute_instruction() )
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nkeynes@359 | 75 | break;
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nkeynes@359 | 76 | #ifdef ENABLE_DEBUG_MODE
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nkeynes@359 | 77 | for( i=0; i<sh4_breakpoint_count; i++ ) {
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nkeynes@359 | 78 | if( sh4_breakpoints[i].address == sh4r.pc ) {
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nkeynes@359 | 79 | break;
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nkeynes@359 | 80 | }
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nkeynes@359 | 81 | }
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nkeynes@359 | 82 | if( i != sh4_breakpoint_count ) {
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nkeynes@740 | 83 | sh4_core_exit( CORE_EXIT_BREAKPOINT );
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nkeynes@359 | 84 | }
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nkeynes@359 | 85 | #endif
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nkeynes@359 | 86 | }
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nkeynes@359 | 87 | }
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nkeynes@359 | 88 |
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nkeynes@359 | 89 | /* If we aborted early, but the cpu is still technically running,
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nkeynes@359 | 90 | * we're doing a hard abort - cut the timeslice back to what we
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nkeynes@359 | 91 | * actually executed
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nkeynes@359 | 92 | */
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nkeynes@359 | 93 | if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
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nkeynes@359 | 94 | nanosecs = sh4r.slice_cycle;
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nkeynes@359 | 95 | }
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nkeynes@359 | 96 | if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
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nkeynes@359 | 97 | TMU_run_slice( nanosecs );
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nkeynes@359 | 98 | SCIF_run_slice( nanosecs );
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nkeynes@359 | 99 | }
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nkeynes@359 | 100 | return nanosecs;
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nkeynes@359 | 101 | }
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nkeynes@359 | 102 |
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nkeynes@359 | 103 | /********************** SH4 emulation core ****************************/
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nkeynes@359 | 104 |
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nkeynes@359 | 105 | #if(SH4_CALLTRACE == 1)
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nkeynes@359 | 106 | #define MAX_CALLSTACK 32
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nkeynes@359 | 107 | static struct call_stack {
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nkeynes@359 | 108 | sh4addr_t call_addr;
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nkeynes@359 | 109 | sh4addr_t target_addr;
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nkeynes@359 | 110 | sh4addr_t stack_pointer;
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nkeynes@359 | 111 | } call_stack[MAX_CALLSTACK];
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nkeynes@359 | 112 |
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nkeynes@359 | 113 | static int call_stack_depth = 0;
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nkeynes@359 | 114 | int sh4_call_trace_on = 0;
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nkeynes@359 | 115 |
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nkeynes@430 | 116 | static inline void trace_call( sh4addr_t source, sh4addr_t dest )
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nkeynes@359 | 117 | {
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nkeynes@359 | 118 | if( call_stack_depth < MAX_CALLSTACK ) {
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nkeynes@359 | 119 | call_stack[call_stack_depth].call_addr = source;
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nkeynes@359 | 120 | call_stack[call_stack_depth].target_addr = dest;
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nkeynes@359 | 121 | call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
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nkeynes@359 | 122 | }
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nkeynes@359 | 123 | call_stack_depth++;
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nkeynes@359 | 124 | }
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nkeynes@359 | 125 |
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nkeynes@430 | 126 | static inline void trace_return( sh4addr_t source, sh4addr_t dest )
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nkeynes@359 | 127 | {
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nkeynes@359 | 128 | if( call_stack_depth > 0 ) {
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nkeynes@359 | 129 | call_stack_depth--;
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nkeynes@359 | 130 | }
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nkeynes@359 | 131 | }
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nkeynes@359 | 132 |
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nkeynes@359 | 133 | void fprint_stack_trace( FILE *f )
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nkeynes@359 | 134 | {
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nkeynes@359 | 135 | int i = call_stack_depth -1;
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nkeynes@359 | 136 | if( i >= MAX_CALLSTACK )
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nkeynes@359 | 137 | i = MAX_CALLSTACK - 1;
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nkeynes@359 | 138 | for( ; i >= 0; i-- ) {
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nkeynes@359 | 139 | fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n",
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nkeynes@359 | 140 | (call_stack_depth - i), call_stack[i].call_addr,
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nkeynes@359 | 141 | call_stack[i].target_addr, call_stack[i].stack_pointer );
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nkeynes@359 | 142 | }
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nkeynes@359 | 143 | }
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nkeynes@359 | 144 |
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nkeynes@359 | 145 | #define TRACE_CALL( source, dest ) trace_call(source, dest)
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nkeynes@359 | 146 | #define TRACE_RETURN( source, dest ) trace_return(source, dest)
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nkeynes@359 | 147 | #else
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nkeynes@359 | 148 | #define TRACE_CALL( dest, rts )
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nkeynes@359 | 149 | #define TRACE_RETURN( source, dest )
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nkeynes@359 | 150 | #endif
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nkeynes@359 | 151 |
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nkeynes@951 | 152 | static gboolean FASTCALL sh4_raise_slot_exception( int normal_code, int slot_code ) {
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nkeynes@951 | 153 | if( sh4r.in_delay_slot ) {
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nkeynes@951 | 154 | sh4_raise_exception(slot_code);
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nkeynes@951 | 155 | } else {
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nkeynes@951 | 156 | sh4_raise_exception(normal_code);
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nkeynes@951 | 157 | }
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nkeynes@951 | 158 | return TRUE;
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nkeynes@951 | 159 | }
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nkeynes@951 | 160 |
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nkeynes@951 | 161 |
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nkeynes@951 | 162 | #define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) { return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL ); }
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nkeynes@951 | 163 | #define CHECKRALIGN16(addr) if( (addr)&0x01 ) { sh4_raise_exception( EXC_DATA_ADDR_READ ); return TRUE; }
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nkeynes@951 | 164 | #define CHECKRALIGN32(addr) if( (addr)&0x03 ) { sh4_raise_exception( EXC_DATA_ADDR_READ ); return TRUE; }
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nkeynes@951 | 165 | #define CHECKRALIGN64(addr) if( (addr)&0x07 ) { sh4_raise_exception( EXC_DATA_ADDR_READ ); return TRUE; }
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nkeynes@951 | 166 | #define CHECKWALIGN16(addr) if( (addr)&0x01 ) { sh4_raise_exception( EXC_DATA_ADDR_WRITE ); return TRUE; }
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nkeynes@951 | 167 | #define CHECKWALIGN32(addr) if( (addr)&0x03 ) { sh4_raise_exception( EXC_DATA_ADDR_WRITE ); return TRUE; }
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nkeynes@951 | 168 | #define CHECKWALIGN64(addr) if( (addr)&0x07 ) { sh4_raise_exception( EXC_DATA_ADDR_WRITE ); return TRUE; }
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nkeynes@732 | 169 |
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nkeynes@732 | 170 | #define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
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nkeynes@740 | 171 | #define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); sh4_core_exit(CORE_EXIT_HALT); return FALSE; }
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nkeynes@951 | 172 | #define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) { sh4_raise_exception(EXC_SLOT_ILLEGAL); return TRUE; }
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nkeynes@732 | 173 |
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nkeynes@939 | 174 | #define ADDRSPACE (IS_SH4_PRIVMODE() ? sh4_address_space : sh4_user_address_space)
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nkeynes@939 | 175 | #define SQADDRSPACE (IS_SH4_PRIVMODE() ? storequeue_address_space : storequeue_user_address_space)
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nkeynes@939 | 176 |
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nkeynes@927 | 177 | #ifdef HAVE_FRAME_ADDRESS
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nkeynes@927 | 178 | static FASTCALL __attribute__((noinline)) void *__first_arg(void *a, void *b) { return a; }
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nkeynes@927 | 179 | #define INIT_EXCEPTIONS(label) goto *__first_arg(&&fnstart,&&label); fnstart:
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nkeynes@939 | 180 | #define MEM_READ_BYTE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte)((addr), &&except)
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nkeynes@1125 | 181 | #define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_byte_for_write)((addr), &&except)
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nkeynes@939 | 182 | #define MEM_READ_WORD( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_word)((addr), &&except)
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nkeynes@939 | 183 | #define MEM_READ_LONG( addr, val ) val = ((mem_read_exc_fn_t)ADDRSPACE[(addr)>>12]->read_long)((addr), &&except)
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nkeynes@939 | 184 | #define MEM_WRITE_BYTE( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_byte)((addr), (val), &&except)
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nkeynes@939 | 185 | #define MEM_WRITE_WORD( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_word)((addr), (val), &&except)
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nkeynes@939 | 186 | #define MEM_WRITE_LONG( addr, val ) ((mem_write_exc_fn_t)ADDRSPACE[(addr)>>12]->write_long)((addr), (val), &&except)
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nkeynes@946 | 187 | #define MEM_PREFETCH( addr ) ((mem_prefetch_exc_fn_t)ADDRSPACE[(addr)>>12]->prefetch)((addr), &&except)
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nkeynes@927 | 188 | #else
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nkeynes@927 | 189 | #define INIT_EXCEPTIONS(label)
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nkeynes@939 | 190 | #define MEM_READ_BYTE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte(addr)
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nkeynes@1125 | 191 | #define MEM_READ_BYTE_FOR_WRITE( addr, val ) val = ADDRSPACE[(addr)>>12]->read_byte_for_write(addr)
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nkeynes@939 | 192 | #define MEM_READ_WORD( addr, val ) val = ADDRSPACE[(addr)>>12]->read_word(addr)
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nkeynes@939 | 193 | #define MEM_READ_LONG( addr, val ) val = ADDRSPACE[(addr)>>12]->read_long(addr)
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nkeynes@939 | 194 | #define MEM_WRITE_BYTE( addr, val ) ADDRSPACE[(addr)>>12]->write_byte(addr, val)
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nkeynes@939 | 195 | #define MEM_WRITE_WORD( addr, val ) ADDRSPACE[(addr)>>12]->write_word(addr, val)
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nkeynes@939 | 196 | #define MEM_WRITE_LONG( addr, val ) ADDRSPACE[(addr)>>12]->write_long(addr, val)
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nkeynes@946 | 197 | #define MEM_PREFETCH( addr ) ADDRSPACE[(addr)>>12]->prefetch(addr)
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nkeynes@927 | 198 | #endif
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nkeynes@359 | 199 |
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nkeynes@359 | 200 | #define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
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nkeynes@359 | 201 |
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nkeynes@732 | 202 | #define MEM_FP_READ( addr, reg ) \
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nkeynes@732 | 203 | if( IS_FPU_DOUBLESIZE() ) { \
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nkeynes@732 | 204 | CHECKRALIGN64(addr); \
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nkeynes@927 | 205 | if( reg & 1 ) { \
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nkeynes@939 | 206 | MEM_READ_LONG( addr, *((uint32_t *)&XF((reg) & 0x0E)) ); \
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nkeynes@939 | 207 | MEM_READ_LONG( addr+4, *((uint32_t *)&XF(reg)) ); \
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nkeynes@927 | 208 | } else { \
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nkeynes@939 | 209 | MEM_READ_LONG( addr, *((uint32_t *)&FR(reg)) ); \
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nkeynes@939 | 210 | MEM_READ_LONG( addr+4, *((uint32_t *)&FR((reg)|0x01)) ); \
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nkeynes@732 | 211 | } \
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nkeynes@732 | 212 | } else { \
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nkeynes@732 | 213 | CHECKRALIGN32(addr); \
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nkeynes@939 | 214 | MEM_READ_LONG( addr, *((uint32_t *)&FR(reg)) ); \
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nkeynes@359 | 215 | }
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nkeynes@732 | 216 | #define MEM_FP_WRITE( addr, reg ) \
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nkeynes@732 | 217 | if( IS_FPU_DOUBLESIZE() ) { \
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nkeynes@732 | 218 | CHECKWALIGN64(addr); \
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nkeynes@927 | 219 | if( reg & 1 ) { \
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nkeynes@939 | 220 | MEM_WRITE_LONG( addr, *((uint32_t *)&XF((reg)&0x0E)) ); \
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nkeynes@939 | 221 | MEM_WRITE_LONG( addr+4, *((uint32_t *)&XF(reg)) ); \
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nkeynes@927 | 222 | } else { \
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nkeynes@939 | 223 | MEM_WRITE_LONG( addr, *((uint32_t *)&FR(reg)) ); \
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nkeynes@939 | 224 | MEM_WRITE_LONG( addr+4, *((uint32_t *)&FR((reg)|0x01)) ); \
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nkeynes@732 | 225 | } \
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nkeynes@732 | 226 | } else { \
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nkeynes@732 | 227 | CHECKWALIGN32(addr); \
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nkeynes@939 | 228 | MEM_WRITE_LONG(addr, *((uint32_t *)&FR((reg))) ); \
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nkeynes@359 | 229 | }
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nkeynes@359 | 230 |
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nkeynes@948 | 231 | #define UNDEF(ir)
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nkeynes@948 | 232 | #define UNIMP(ir)
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nkeynes@948 | 233 |
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nkeynes@948 | 234 | /**
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nkeynes@948 | 235 | * Perform instruction-completion following core exit of a partially completed
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nkeynes@948 | 236 | * instruction. NOTE: This is only allowed on memory writes, operation is not
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nkeynes@948 | 237 | * guaranteed in any other case.
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nkeynes@948 | 238 | */
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nkeynes@948 | 239 | void sh4_finalize_instruction( void )
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nkeynes@948 | 240 | {
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nkeynes@948 | 241 | unsigned short ir;
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nkeynes@948 | 242 | uint32_t tmp;
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nkeynes@948 | 243 |
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nkeynes@1014 | 244 | if( IS_SYSCALL(sh4r.pc) ) {
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nkeynes@1014 | 245 | return;
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nkeynes@359 | 246 | }
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nkeynes@948 | 247 | assert( IS_IN_ICACHE(sh4r.pc) );
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nkeynes@948 | 248 | ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
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nkeynes@948 | 249 |
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nkeynes@948 | 250 | /**
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nkeynes@948 | 251 | * Note - we can't take an exit on a control transfer instruction itself,
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nkeynes@948 | 252 | * which means the exit must have happened in the delay slot. So for these
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nkeynes@948 | 253 | * cases, finalize the delay slot instruction, and re-execute the control transfer.
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nkeynes@948 | 254 | *
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nkeynes@948 | 255 | * For delay slots which modify the argument used in the branch instruction,
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nkeynes@948 | 256 | * we pretty much just assume that that can't have already happened in an exit case.
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nkeynes@948 | 257 | */
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nkeynes@948 | 258 |
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nkeynes@948 | 259 | %%
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nkeynes@948 | 260 | BRA disp {:
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nkeynes@948 | 261 | sh4r.pc += 2;
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nkeynes@948 | 262 | sh4_finalize_instruction();
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nkeynes@948 | 263 | sh4r.pc += disp;
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nkeynes@948 | 264 | :}
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nkeynes@948 | 265 | BRAF Rn {:
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nkeynes@948 | 266 | sh4r.pc += 2;
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nkeynes@948 | 267 | tmp = sh4r.r[Rn];
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nkeynes@948 | 268 | sh4_finalize_instruction();
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nkeynes@948 | 269 | sh4r.pc += tmp;
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nkeynes@948 | 270 | :}
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nkeynes@948 | 271 | BSR disp {:
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nkeynes@948 | 272 | /* Note: PR is already set */
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nkeynes@948 | 273 | sh4r.pc += 2;
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nkeynes@948 | 274 | sh4_finalize_instruction();
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nkeynes@948 | 275 | sh4r.pc += disp;
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nkeynes@948 | 276 | :}
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nkeynes@948 | 277 | BSRF Rn {:
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nkeynes@948 | 278 | /* Note: PR is already set */
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nkeynes@948 | 279 | sh4r.pc += 2;
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nkeynes@948 | 280 | tmp = sh4r.r[Rn];
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nkeynes@948 | 281 | sh4_finalize_instruction();
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nkeynes@948 | 282 | sh4r.pc += tmp;
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nkeynes@948 | 283 | :}
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nkeynes@948 | 284 | BF/S disp {:
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nkeynes@948 | 285 | sh4r.pc += 2;
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nkeynes@948 | 286 | sh4_finalize_instruction();
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nkeynes@948 | 287 | if( !sh4r.t ) {
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nkeynes@948 | 288 | sh4r.pc += disp;
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nkeynes@948 | 289 | }
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nkeynes@948 | 290 | :}
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nkeynes@948 | 291 | BT/S disp {:
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nkeynes@948 | 292 | sh4r.pc += 2;
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nkeynes@948 | 293 | sh4_finalize_instruction();
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nkeynes@948 | 294 | if( sh4r.t ) {
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nkeynes@948 | 295 | sh4r.pc += disp;
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nkeynes@948 | 296 | }
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nkeynes@948 | 297 | :}
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nkeynes@948 | 298 | JMP @Rn {:
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nkeynes@948 | 299 | sh4r.pc += 2;
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nkeynes@948 | 300 | tmp = sh4r.r[Rn];
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nkeynes@948 | 301 | sh4_finalize_instruction();
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nkeynes@948 | 302 | sh4r.pc = tmp;
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nkeynes@948 | 303 | sh4r.new_pc = tmp + 2;
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nkeynes@974 | 304 | sh4r.slice_cycle += sh4_cpu_period;
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nkeynes@948 | 305 | return;
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nkeynes@948 | 306 | :}
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nkeynes@948 | 307 | JSR @Rn {:
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nkeynes@948 | 308 | /* Note: PR is already set */
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nkeynes@948 | 309 | sh4r.pc += 2;
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nkeynes@948 | 310 | tmp = sh4r.r[Rn];
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nkeynes@948 | 311 | sh4_finalize_instruction();
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nkeynes@948 | 312 | sh4r.pc = tmp;
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nkeynes@948 | 313 | sh4r.new_pc = tmp + 2;
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nkeynes@974 | 314 | sh4r.slice_cycle += sh4_cpu_period;
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nkeynes@948 | 315 | return;
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nkeynes@948 | 316 | :}
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nkeynes@948 | 317 | RTS {:
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nkeynes@948 | 318 | sh4r.pc += 2;
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nkeynes@948 | 319 | sh4_finalize_instruction();
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nkeynes@948 | 320 | sh4r.pc = sh4r.pr;
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nkeynes@948 | 321 | sh4r.new_pc = sh4r.pr + 2;
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nkeynes@974 | 322 | sh4r.slice_cycle += sh4_cpu_period;
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nkeynes@948 | 323 | return;
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nkeynes@948 | 324 | :}
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nkeynes@948 | 325 | RTE {:
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nkeynes@948 | 326 | /* SR is already set */
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nkeynes@948 | 327 | sh4r.pc += 2;
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nkeynes@948 | 328 | sh4_finalize_instruction();
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nkeynes@948 | 329 | sh4r.pc = sh4r.spc;
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nkeynes@948 | 330 | sh4r.new_pc = sh4r.pr + 2;
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nkeynes@974 | 331 | sh4r.slice_cycle += sh4_cpu_period;
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nkeynes@948 | 332 | return;
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nkeynes@948 | 333 | :}
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nkeynes@948 | 334 | MOV.B Rm, @-Rn {: sh4r.r[Rn]--; :}
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nkeynes@948 | 335 | MOV.W Rm, @-Rn {: sh4r.r[Rn] -= 2; :}
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nkeynes@948 | 336 | MOV.L Rm, @-Rn {: sh4r.r[Rn] -= 4; :}
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nkeynes@970 | 337 | MOV.B @Rm+, Rn {: if( Rm != Rn ) { sh4r.r[Rm] ++; } :}
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nkeynes@970 | 338 | MOV.W @Rm+, Rn {: if( Rm != Rn ) { sh4r.r[Rm] += 2; } :}
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nkeynes@970 | 339 | MOV.L @Rm+, Rn {: if( Rm != Rn ) { sh4r.r[Rm] += 4; } :}
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nkeynes@948 | 340 | %%
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nkeynes@974 | 341 | sh4r.in_delay_slot = 0;
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nkeynes@948 | 342 | sh4r.pc += 2;
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nkeynes@948 | 343 | sh4r.new_pc = sh4r.pc+2;
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nkeynes@948 | 344 | sh4r.slice_cycle += sh4_cpu_period;
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nkeynes@948 | 345 | }
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nkeynes@948 | 346 |
|
nkeynes@986 | 347 | #undef UNDEF
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nkeynes@986 | 348 | #undef UNIMP
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nkeynes@948 | 349 |
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nkeynes@948 | 350 | #define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
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nkeynes@948 | 351 | #define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); sh4_core_exit(CORE_EXIT_HALT); return FALSE; }while(0)
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nkeynes@948 | 352 |
|
nkeynes@948 | 353 |
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nkeynes@359 | 354 | gboolean sh4_execute_instruction( void )
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nkeynes@359 | 355 | {
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nkeynes@359 | 356 | uint32_t pc;
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nkeynes@359 | 357 | unsigned short ir;
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nkeynes@359 | 358 | uint32_t tmp;
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nkeynes@359 | 359 | float ftmp;
|
nkeynes@359 | 360 | double dtmp;
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nkeynes@586 | 361 | int64_t memtmp; // temporary holder for memory reads
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nkeynes@927 | 362 |
|
nkeynes@927 | 363 | INIT_EXCEPTIONS(except)
|
nkeynes@359 | 364 |
|
nkeynes@359 | 365 | #define R0 sh4r.r[0]
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nkeynes@359 | 366 | pc = sh4r.pc;
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nkeynes@359 | 367 | if( pc > 0xFFFFFF00 ) {
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nkeynes@359 | 368 | /* SYSCALL Magic */
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nkeynes@1103 | 369 | sh4r.in_delay_slot = 0;
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nkeynes@1103 | 370 | sh4r.pc = sh4r.pr;
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nkeynes@1103 | 371 | sh4r.new_pc = sh4r.pc + 2;
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nkeynes@359 | 372 | syscall_invoke( pc );
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nkeynes@671 | 373 | return TRUE;
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nkeynes@359 | 374 | }
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nkeynes@359 | 375 | CHECKRALIGN16(pc);
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nkeynes@359 | 376 |
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nkeynes@671 | 377 | #ifdef ENABLE_SH4STATS
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nkeynes@671 | 378 | sh4_stats_add_by_pc(sh4r.pc);
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nkeynes@671 | 379 | #endif
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nkeynes@671 | 380 |
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nkeynes@359 | 381 | /* Read instruction */
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nkeynes@586 | 382 | if( !IS_IN_ICACHE(pc) ) {
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nkeynes@974 | 383 | gboolean delay_slot = sh4r.in_delay_slot;
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nkeynes@586 | 384 | if( !mmu_update_icache(pc) ) {
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nkeynes@974 | 385 | if( delay_slot ) {
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nkeynes@974 | 386 | sh4r.spc -= 2;
|
nkeynes@974 | 387 | }
|
nkeynes@586 | 388 | // Fault - look for the fault handler
|
nkeynes@586 | 389 | if( !mmu_update_icache(sh4r.pc) ) {
|
nkeynes@586 | 390 | // double fault - halt
|
nkeynes@586 | 391 | ERROR( "Double fault - halting" );
|
nkeynes@740 | 392 | sh4_core_exit(CORE_EXIT_HALT);
|
nkeynes@586 | 393 | return FALSE;
|
nkeynes@586 | 394 | }
|
nkeynes@359 | 395 | }
|
nkeynes@586 | 396 | pc = sh4r.pc;
|
nkeynes@359 | 397 | }
|
nkeynes@586 | 398 | assert( IS_IN_ICACHE(pc) );
|
nkeynes@586 | 399 | ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
|
nkeynes@948 | 400 |
|
nkeynes@948 | 401 | /* FIXME: This is a bit of a hack, but the PC of the delay slot should not
|
nkeynes@948 | 402 | * be visible until after the instruction has executed (for exception
|
nkeynes@948 | 403 | * correctness)
|
nkeynes@948 | 404 | */
|
nkeynes@948 | 405 | if( sh4r.in_delay_slot ) {
|
nkeynes@948 | 406 | sh4r.pc -= 2;
|
nkeynes@948 | 407 | }
|
nkeynes@359 | 408 | %%
|
nkeynes@359 | 409 | AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
|
nkeynes@359 | 410 | AND #imm, R0 {: R0 &= imm; :}
|
nkeynes@1125 | 411 | AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}
|
nkeynes@359 | 412 | NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
|
nkeynes@359 | 413 | OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
|
nkeynes@359 | 414 | OR #imm, R0 {: R0 |= imm; :}
|
nkeynes@1125 | 415 | OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}
|
nkeynes@359 | 416 | TAS.B @Rn {:
|
nkeynes@1125 | 417 | MEM_READ_BYTE_FOR_WRITE( sh4r.r[Rn], tmp );
|
nkeynes@359 | 418 | sh4r.t = ( tmp == 0 ? 1 : 0 );
|
nkeynes@359 | 419 | MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
|
nkeynes@359 | 420 | :}
|
nkeynes@359 | 421 | TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
|
nkeynes@359 | 422 | TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
|
nkeynes@586 | 423 | TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}
|
nkeynes@359 | 424 | XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
|
nkeynes@359 | 425 | XOR #imm, R0 {: R0 ^= imm; :}
|
nkeynes@1125 | 426 | XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE_FOR_WRITE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}
|
nkeynes@359 | 427 | XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
|
nkeynes@359 | 428 |
|
nkeynes@359 | 429 | ROTL Rn {:
|
nkeynes@359 | 430 | sh4r.t = sh4r.r[Rn] >> 31;
|
nkeynes@359 | 431 | sh4r.r[Rn] <<= 1;
|
nkeynes@359 | 432 | sh4r.r[Rn] |= sh4r.t;
|
nkeynes@359 | 433 | :}
|
nkeynes@359 | 434 | ROTR Rn {:
|
nkeynes@359 | 435 | sh4r.t = sh4r.r[Rn] & 0x00000001;
|
nkeynes@359 | 436 | sh4r.r[Rn] >>= 1;
|
nkeynes@359 | 437 | sh4r.r[Rn] |= (sh4r.t << 31);
|
nkeynes@359 | 438 | :}
|
nkeynes@359 | 439 | ROTCL Rn {:
|
nkeynes@359 | 440 | tmp = sh4r.r[Rn] >> 31;
|
nkeynes@359 | 441 | sh4r.r[Rn] <<= 1;
|
nkeynes@359 | 442 | sh4r.r[Rn] |= sh4r.t;
|
nkeynes@359 | 443 | sh4r.t = tmp;
|
nkeynes@359 | 444 | :}
|
nkeynes@359 | 445 | ROTCR Rn {:
|
nkeynes@359 | 446 | tmp = sh4r.r[Rn] & 0x00000001;
|
nkeynes@359 | 447 | sh4r.r[Rn] >>= 1;
|
nkeynes@359 | 448 | sh4r.r[Rn] |= (sh4r.t << 31 );
|
nkeynes@359 | 449 | sh4r.t = tmp;
|
nkeynes@359 | 450 | :}
|
nkeynes@359 | 451 | SHAD Rm, Rn {:
|
nkeynes@359 | 452 | tmp = sh4r.r[Rm];
|
nkeynes@359 | 453 | if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
|
nkeynes@359 | 454 | else if( (tmp & 0x1F) == 0 )
|
nkeynes@359 | 455 | sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
|
nkeynes@359 | 456 | else
|
nkeynes@359 | 457 | sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
|
nkeynes@359 | 458 | :}
|
nkeynes@359 | 459 | SHLD Rm, Rn {:
|
nkeynes@359 | 460 | tmp = sh4r.r[Rm];
|
nkeynes@359 | 461 | if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
|
nkeynes@359 | 462 | else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
|
nkeynes@359 | 463 | else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
|
nkeynes@359 | 464 | :}
|
nkeynes@359 | 465 | SHAL Rn {:
|
nkeynes@359 | 466 | sh4r.t = sh4r.r[Rn] >> 31;
|
nkeynes@359 | 467 | sh4r.r[Rn] <<= 1;
|
nkeynes@359 | 468 | :}
|
nkeynes@359 | 469 | SHAR Rn {:
|
nkeynes@359 | 470 | sh4r.t = sh4r.r[Rn] & 0x00000001;
|
nkeynes@359 | 471 | sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
|
nkeynes@359 | 472 | :}
|
nkeynes@359 | 473 | SHLL Rn {: sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1; :}
|
nkeynes@359 | 474 | SHLR Rn {: sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1; :}
|
nkeynes@359 | 475 | SHLL2 Rn {: sh4r.r[Rn] <<= 2; :}
|
nkeynes@359 | 476 | SHLR2 Rn {: sh4r.r[Rn] >>= 2; :}
|
nkeynes@359 | 477 | SHLL8 Rn {: sh4r.r[Rn] <<= 8; :}
|
nkeynes@359 | 478 | SHLR8 Rn {: sh4r.r[Rn] >>= 8; :}
|
nkeynes@359 | 479 | SHLL16 Rn {: sh4r.r[Rn] <<= 16; :}
|
nkeynes@359 | 480 | SHLR16 Rn {: sh4r.r[Rn] >>= 16; :}
|
nkeynes@359 | 481 |
|
nkeynes@359 | 482 | EXTU.B Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF; :}
|
nkeynes@359 | 483 | EXTU.W Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF; :}
|
nkeynes@359 | 484 | EXTS.B Rm, Rn {: sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF ); :}
|
nkeynes@359 | 485 | EXTS.W Rm, Rn {: sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF ); :}
|
nkeynes@359 | 486 | SWAP.B Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) | ((sh4r.r[Rm]&0x0000FF00)>>8) | ((sh4r.r[Rm]&0x000000FF)<<8); :}
|
nkeynes@359 | 487 | SWAP.W Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]>>16) | (sh4r.r[Rm]<<16); :}
|
nkeynes@359 | 488 |
|
nkeynes@359 | 489 | CLRT {: sh4r.t = 0; :}
|
nkeynes@359 | 490 | SETT {: sh4r.t = 1; :}
|
nkeynes@359 | 491 | CLRMAC {: sh4r.mac = 0; :}
|
nkeynes@550 | 492 | LDTLB {: MMU_ldtlb(); :}
|
nkeynes@359 | 493 | CLRS {: sh4r.s = 0; :}
|
nkeynes@359 | 494 | SETS {: sh4r.s = 1; :}
|
nkeynes@359 | 495 | MOVT Rn {: sh4r.r[Rn] = sh4r.t; :}
|
nkeynes@359 | 496 | NOP {: /* NOP */ :}
|
nkeynes@359 | 497 |
|
nkeynes@359 | 498 | PREF @Rn {:
|
nkeynes@946 | 499 | MEM_PREFETCH(sh4r.r[Rn]);
|
nkeynes@359 | 500 | :}
|
nkeynes@359 | 501 | OCBI @Rn {: :}
|
nkeynes@359 | 502 | OCBP @Rn {: :}
|
nkeynes@359 | 503 | OCBWB @Rn {: :}
|
nkeynes@359 | 504 | MOVCA.L R0, @Rn {:
|
nkeynes@359 | 505 | tmp = sh4r.r[Rn];
|
nkeynes@359 | 506 | CHECKWALIGN32(tmp);
|
nkeynes@359 | 507 | MEM_WRITE_LONG( tmp, R0 );
|
nkeynes@359 | 508 | :}
|
nkeynes@359 | 509 | MOV.B Rm, @(R0, Rn) {: MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] ); :}
|
nkeynes@359 | 510 | MOV.W Rm, @(R0, Rn) {:
|
nkeynes@359 | 511 | CHECKWALIGN16( R0 + sh4r.r[Rn] );
|
nkeynes@359 | 512 | MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
|
nkeynes@359 | 513 | :}
|
nkeynes@359 | 514 | MOV.L Rm, @(R0, Rn) {:
|
nkeynes@359 | 515 | CHECKWALIGN32( R0 + sh4r.r[Rn] );
|
nkeynes@359 | 516 | MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
|
nkeynes@359 | 517 | :}
|
nkeynes@586 | 518 | MOV.B @(R0, Rm), Rn {: MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] ); :}
|
nkeynes@359 | 519 | MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
|
nkeynes@586 | 520 | MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
|
nkeynes@359 | 521 | :}
|
nkeynes@359 | 522 | MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
|
nkeynes@586 | 523 | MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
|
nkeynes@359 | 524 | :}
|
nkeynes@359 | 525 | MOV.L Rm, @(disp, Rn) {:
|
nkeynes@359 | 526 | tmp = sh4r.r[Rn] + disp;
|
nkeynes@359 | 527 | CHECKWALIGN32( tmp );
|
nkeynes@359 | 528 | MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
|
nkeynes@359 | 529 | :}
|
nkeynes@359 | 530 | MOV.B Rm, @Rn {: MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
|
nkeynes@359 | 531 | MOV.W Rm, @Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
|
nkeynes@359 | 532 | MOV.L Rm, @Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
|
nkeynes@587 | 533 | MOV.B Rm, @-Rn {: MEM_WRITE_BYTE( sh4r.r[Rn]-1, sh4r.r[Rm] ); sh4r.r[Rn]--; :}
|
nkeynes@587 | 534 | MOV.W Rm, @-Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn]-2, sh4r.r[Rm] ); sh4r.r[Rn] -= 2; :}
|
nkeynes@587 | 535 | MOV.L Rm, @-Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r[Rm] ); sh4r.r[Rn] -= 4; :}
|
nkeynes@359 | 536 | MOV.L @(disp, Rm), Rn {:
|
nkeynes@359 | 537 | tmp = sh4r.r[Rm] + disp;
|
nkeynes@359 | 538 | CHECKRALIGN32( tmp );
|
nkeynes@586 | 539 | MEM_READ_LONG( tmp, sh4r.r[Rn] );
|
nkeynes@359 | 540 | :}
|
nkeynes@586 | 541 | MOV.B @Rm, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); :}
|
nkeynes@586 | 542 | MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); :}
|
nkeynes@586 | 543 | MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); :}
|
nkeynes@359 | 544 | MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
|
nkeynes@970 | 545 | MOV.B @Rm+, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); if( Rm != Rn ) { sh4r.r[Rm] ++; } :}
|
nkeynes@970 | 546 | MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); if( Rm != Rn ) { sh4r.r[Rm] += 2; } :}
|
nkeynes@970 | 547 | MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); if( Rm != Rn ) { sh4r.r[Rm] += 4; } :}
|
nkeynes@359 | 548 | MOV.L @(disp, PC), Rn {:
|
nkeynes@359 | 549 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 550 | tmp = (pc&0xFFFFFFFC) + disp + 4;
|
nkeynes@586 | 551 | MEM_READ_LONG( tmp, sh4r.r[Rn] );
|
nkeynes@359 | 552 | :}
|
nkeynes@359 | 553 | MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
|
nkeynes@359 | 554 | MOV.W R0, @(disp, GBR) {:
|
nkeynes@359 | 555 | tmp = sh4r.gbr + disp;
|
nkeynes@359 | 556 | CHECKWALIGN16( tmp );
|
nkeynes@359 | 557 | MEM_WRITE_WORD( tmp, R0 );
|
nkeynes@359 | 558 | :}
|
nkeynes@359 | 559 | MOV.L R0, @(disp, GBR) {:
|
nkeynes@359 | 560 | tmp = sh4r.gbr + disp;
|
nkeynes@359 | 561 | CHECKWALIGN32( tmp );
|
nkeynes@359 | 562 | MEM_WRITE_LONG( tmp, R0 );
|
nkeynes@359 | 563 | :}
|
nkeynes@586 | 564 | MOV.B @(disp, GBR), R0 {: MEM_READ_BYTE( sh4r.gbr + disp, R0 ); :}
|
nkeynes@359 | 565 | MOV.W @(disp, GBR), R0 {:
|
nkeynes@359 | 566 | tmp = sh4r.gbr + disp;
|
nkeynes@359 | 567 | CHECKRALIGN16( tmp );
|
nkeynes@586 | 568 | MEM_READ_WORD( tmp, R0 );
|
nkeynes@359 | 569 | :}
|
nkeynes@359 | 570 | MOV.L @(disp, GBR), R0 {:
|
nkeynes@359 | 571 | tmp = sh4r.gbr + disp;
|
nkeynes@359 | 572 | CHECKRALIGN32( tmp );
|
nkeynes@586 | 573 | MEM_READ_LONG( tmp, R0 );
|
nkeynes@359 | 574 | :}
|
nkeynes@359 | 575 | MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
|
nkeynes@359 | 576 | MOV.W R0, @(disp, Rn) {:
|
nkeynes@359 | 577 | tmp = sh4r.r[Rn] + disp;
|
nkeynes@359 | 578 | CHECKWALIGN16( tmp );
|
nkeynes@359 | 579 | MEM_WRITE_WORD( tmp, R0 );
|
nkeynes@359 | 580 | :}
|
nkeynes@586 | 581 | MOV.B @(disp, Rm), R0 {: MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 ); :}
|
nkeynes@359 | 582 | MOV.W @(disp, Rm), R0 {:
|
nkeynes@359 | 583 | tmp = sh4r.r[Rm] + disp;
|
nkeynes@359 | 584 | CHECKRALIGN16( tmp );
|
nkeynes@586 | 585 | MEM_READ_WORD( tmp, R0 );
|
nkeynes@359 | 586 | :}
|
nkeynes@359 | 587 | MOV.W @(disp, PC), Rn {:
|
nkeynes@359 | 588 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 589 | tmp = pc + 4 + disp;
|
nkeynes@586 | 590 | MEM_READ_WORD( tmp, sh4r.r[Rn] );
|
nkeynes@359 | 591 | :}
|
nkeynes@359 | 592 | MOVA @(disp, PC), R0 {:
|
nkeynes@359 | 593 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 594 | R0 = (pc&0xFFFFFFFC) + disp + 4;
|
nkeynes@359 | 595 | :}
|
nkeynes@359 | 596 | MOV #imm, Rn {: sh4r.r[Rn] = imm; :}
|
nkeynes@359 | 597 |
|
nkeynes@732 | 598 | FMOV @(R0, Rm), FRn {: MEM_FP_READ( sh4r.r[Rm] + R0, FRn ); :}
|
nkeynes@732 | 599 | FMOV FRm, @(R0, Rn) {: MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm ); :}
|
nkeynes@732 | 600 | FMOV @Rm, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); :}
|
nkeynes@732 | 601 | FMOV @Rm+, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH; :}
|
nkeynes@732 | 602 | FMOV FRm, @Rn {: MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
|
nkeynes@732 | 603 | FMOV FRm, @-Rn {: MEM_FP_WRITE( sh4r.r[Rn] - FP_WIDTH, FRm ); sh4r.r[Rn] -= FP_WIDTH; :}
|
nkeynes@732 | 604 | FMOV FRm, FRn {:
|
nkeynes@732 | 605 | if( IS_FPU_DOUBLESIZE() )
|
nkeynes@732 | 606 | DR(FRn) = DR(FRm);
|
nkeynes@732 | 607 | else
|
nkeynes@732 | 608 | FR(FRn) = FR(FRm);
|
nkeynes@732 | 609 | :}
|
nkeynes@732 | 610 |
|
nkeynes@359 | 611 | CMP/EQ #imm, R0 {: sh4r.t = ( R0 == imm ? 1 : 0 ); :}
|
nkeynes@359 | 612 | CMP/EQ Rm, Rn {: sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 ); :}
|
nkeynes@359 | 613 | CMP/GE Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
|
nkeynes@359 | 614 | CMP/GT Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
|
nkeynes@359 | 615 | CMP/HI Rm, Rn {: sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 ); :}
|
nkeynes@359 | 616 | CMP/HS Rm, Rn {: sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 ); :}
|
nkeynes@359 | 617 | CMP/PL Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 ); :}
|
nkeynes@359 | 618 | CMP/PZ Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 ); :}
|
nkeynes@359 | 619 | CMP/STR Rm, Rn {:
|
nkeynes@359 | 620 | /* set T = 1 if any byte in RM & RN is the same */
|
nkeynes@359 | 621 | tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
|
nkeynes@359 | 622 | sh4r.t = ((tmp&0x000000FF)==0 || (tmp&0x0000FF00)==0 ||
|
nkeynes@359 | 623 | (tmp&0x00FF0000)==0 || (tmp&0xFF000000)==0)?1:0;
|
nkeynes@359 | 624 | :}
|
nkeynes@359 | 625 |
|
nkeynes@359 | 626 | ADD Rm, Rn {: sh4r.r[Rn] += sh4r.r[Rm]; :}
|
nkeynes@359 | 627 | ADD #imm, Rn {: sh4r.r[Rn] += imm; :}
|
nkeynes@359 | 628 | ADDC Rm, Rn {:
|
nkeynes@359 | 629 | tmp = sh4r.r[Rn];
|
nkeynes@359 | 630 | sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
|
nkeynes@359 | 631 | sh4r.t = ( sh4r.r[Rn] < tmp || (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
|
nkeynes@359 | 632 | :}
|
nkeynes@359 | 633 | ADDV Rm, Rn {:
|
nkeynes@359 | 634 | tmp = sh4r.r[Rn] + sh4r.r[Rm];
|
nkeynes@359 | 635 | sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
|
nkeynes@359 | 636 | sh4r.r[Rn] = tmp;
|
nkeynes@359 | 637 | :}
|
nkeynes@359 | 638 | DIV0U {: sh4r.m = sh4r.q = sh4r.t = 0; :}
|
nkeynes@359 | 639 | DIV0S Rm, Rn {:
|
nkeynes@359 | 640 | sh4r.q = sh4r.r[Rn]>>31;
|
nkeynes@359 | 641 | sh4r.m = sh4r.r[Rm]>>31;
|
nkeynes@359 | 642 | sh4r.t = sh4r.q ^ sh4r.m;
|
nkeynes@359 | 643 | :}
|
nkeynes@359 | 644 | DIV1 Rm, Rn {:
|
nkeynes@384 | 645 | /* This is derived from the sh4 manual with some simplifications */
|
nkeynes@359 | 646 | uint32_t tmp0, tmp1, tmp2, dir;
|
nkeynes@359 | 647 |
|
nkeynes@359 | 648 | dir = sh4r.q ^ sh4r.m;
|
nkeynes@359 | 649 | sh4r.q = (sh4r.r[Rn] >> 31);
|
nkeynes@359 | 650 | tmp2 = sh4r.r[Rm];
|
nkeynes@359 | 651 | sh4r.r[Rn] = (sh4r.r[Rn] << 1) | sh4r.t;
|
nkeynes@359 | 652 | tmp0 = sh4r.r[Rn];
|
nkeynes@359 | 653 | if( dir ) {
|
nkeynes@359 | 654 | sh4r.r[Rn] += tmp2;
|
nkeynes@359 | 655 | tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
|
nkeynes@359 | 656 | } else {
|
nkeynes@359 | 657 | sh4r.r[Rn] -= tmp2;
|
nkeynes@359 | 658 | tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
|
nkeynes@359 | 659 | }
|
nkeynes@359 | 660 | sh4r.q ^= sh4r.m ^ tmp1;
|
nkeynes@359 | 661 | sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
|
nkeynes@359 | 662 | :}
|
nkeynes@359 | 663 | DMULS.L Rm, Rn {: sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]); :}
|
nkeynes@359 | 664 | DMULU.L Rm, Rn {: sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]); :}
|
nkeynes@359 | 665 | DT Rn {:
|
nkeynes@359 | 666 | sh4r.r[Rn] --;
|
nkeynes@359 | 667 | sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
|
nkeynes@359 | 668 | :}
|
nkeynes@359 | 669 | MAC.W @Rm+, @Rn+ {:
|
nkeynes@587 | 670 | int32_t stmp;
|
nkeynes@587 | 671 | if( Rm == Rn ) {
|
nkeynes@587 | 672 | CHECKRALIGN16(sh4r.r[Rn]);
|
nkeynes@587 | 673 | MEM_READ_WORD( sh4r.r[Rn], tmp );
|
nkeynes@587 | 674 | stmp = SIGNEXT16(tmp);
|
nkeynes@587 | 675 | MEM_READ_WORD( sh4r.r[Rn]+2, tmp );
|
nkeynes@587 | 676 | stmp *= SIGNEXT16(tmp);
|
nkeynes@587 | 677 | sh4r.r[Rn] += 4;
|
nkeynes@587 | 678 | } else {
|
nkeynes@587 | 679 | CHECKRALIGN16( sh4r.r[Rn] );
|
nkeynes@587 | 680 | CHECKRALIGN16( sh4r.r[Rm] );
|
nkeynes@587 | 681 | MEM_READ_WORD(sh4r.r[Rn], tmp);
|
nkeynes@587 | 682 | stmp = SIGNEXT16(tmp);
|
nkeynes@587 | 683 | MEM_READ_WORD(sh4r.r[Rm], tmp);
|
nkeynes@587 | 684 | stmp = stmp * SIGNEXT16(tmp);
|
nkeynes@587 | 685 | sh4r.r[Rn] += 2;
|
nkeynes@587 | 686 | sh4r.r[Rm] += 2;
|
nkeynes@587 | 687 | }
|
nkeynes@359 | 688 | if( sh4r.s ) {
|
nkeynes@359 | 689 | int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
|
nkeynes@359 | 690 | if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
|
nkeynes@359 | 691 | sh4r.mac = 0x000000017FFFFFFFLL;
|
nkeynes@359 | 692 | } else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
|
nkeynes@359 | 693 | sh4r.mac = 0x0000000180000000LL;
|
nkeynes@359 | 694 | } else {
|
nkeynes@359 | 695 | sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
|
nkeynes@359 | 696 | ((uint32_t)(sh4r.mac + stmp));
|
nkeynes@359 | 697 | }
|
nkeynes@359 | 698 | } else {
|
nkeynes@359 | 699 | sh4r.mac += SIGNEXT32(stmp);
|
nkeynes@359 | 700 | }
|
nkeynes@359 | 701 | :}
|
nkeynes@359 | 702 | MAC.L @Rm+, @Rn+ {:
|
nkeynes@587 | 703 | int64_t tmpl;
|
nkeynes@587 | 704 | if( Rm == Rn ) {
|
nkeynes@587 | 705 | CHECKRALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 706 | MEM_READ_LONG(sh4r.r[Rn], tmp);
|
nkeynes@587 | 707 | tmpl = SIGNEXT32(tmp);
|
nkeynes@587 | 708 | MEM_READ_LONG(sh4r.r[Rn]+4, tmp);
|
nkeynes@587 | 709 | tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
|
nkeynes@587 | 710 | sh4r.r[Rn] += 8;
|
nkeynes@587 | 711 | } else {
|
nkeynes@587 | 712 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@587 | 713 | CHECKRALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 714 | MEM_READ_LONG(sh4r.r[Rn], tmp);
|
nkeynes@587 | 715 | tmpl = SIGNEXT32(tmp);
|
nkeynes@587 | 716 | MEM_READ_LONG(sh4r.r[Rm], tmp);
|
nkeynes@587 | 717 | tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
|
nkeynes@587 | 718 | sh4r.r[Rn] += 4;
|
nkeynes@587 | 719 | sh4r.r[Rm] += 4;
|
nkeynes@587 | 720 | }
|
nkeynes@359 | 721 | if( sh4r.s ) {
|
nkeynes@359 | 722 | /* 48-bit Saturation. Yuch */
|
nkeynes@359 | 723 | if( tmpl < (int64_t)0xFFFF800000000000LL )
|
nkeynes@359 | 724 | tmpl = 0xFFFF800000000000LL;
|
nkeynes@359 | 725 | else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
|
nkeynes@359 | 726 | tmpl = 0x00007FFFFFFFFFFFLL;
|
nkeynes@359 | 727 | }
|
nkeynes@359 | 728 | sh4r.mac = tmpl;
|
nkeynes@359 | 729 | :}
|
nkeynes@359 | 730 | MUL.L Rm, Rn {: sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
|
nkeynes@359 | 731 | (sh4r.r[Rm] * sh4r.r[Rn]); :}
|
nkeynes@359 | 732 | MULU.W Rm, Rn {:
|
nkeynes@359 | 733 | sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
|
nkeynes@359 | 734 | (uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
|
nkeynes@359 | 735 | :}
|
nkeynes@359 | 736 | MULS.W Rm, Rn {:
|
nkeynes@359 | 737 | sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
|
nkeynes@359 | 738 | (uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
|
nkeynes@359 | 739 | :}
|
nkeynes@359 | 740 | NEGC Rm, Rn {:
|
nkeynes@359 | 741 | tmp = 0 - sh4r.r[Rm];
|
nkeynes@359 | 742 | sh4r.r[Rn] = tmp - sh4r.t;
|
nkeynes@359 | 743 | sh4r.t = ( 0<tmp || tmp<sh4r.r[Rn] ? 1 : 0 );
|
nkeynes@359 | 744 | :}
|
nkeynes@359 | 745 | NEG Rm, Rn {: sh4r.r[Rn] = 0 - sh4r.r[Rm]; :}
|
nkeynes@359 | 746 | SUB Rm, Rn {: sh4r.r[Rn] -= sh4r.r[Rm]; :}
|
nkeynes@359 | 747 | SUBC Rm, Rn {:
|
nkeynes@359 | 748 | tmp = sh4r.r[Rn];
|
nkeynes@359 | 749 | sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
|
nkeynes@359 | 750 | sh4r.t = (sh4r.r[Rn] > tmp || (sh4r.r[Rn] == tmp && sh4r.t == 1));
|
nkeynes@359 | 751 | :}
|
nkeynes@1083 | 752 | SUBV Rm, Rn {:
|
nkeynes@1083 | 753 | tmp = sh4r.r[Rn] - sh4r.r[Rm];
|
nkeynes@1083 | 754 | sh4r.t = ( (sh4r.r[Rn]>>31) != (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
|
nkeynes@1083 | 755 | sh4r.r[Rn] = tmp;
|
nkeynes@1083 | 756 | :}
|
nkeynes@359 | 757 | BRAF Rn {:
|
nkeynes@359 | 758 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 759 | CHECKDEST( pc + 4 + sh4r.r[Rn] );
|
nkeynes@359 | 760 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 761 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 762 | sh4r.new_pc = pc + 4 + sh4r.r[Rn];
|
nkeynes@359 | 763 | return TRUE;
|
nkeynes@359 | 764 | :}
|
nkeynes@359 | 765 | BSRF Rn {:
|
nkeynes@359 | 766 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 767 | CHECKDEST( pc + 4 + sh4r.r[Rn] );
|
nkeynes@359 | 768 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 769 | sh4r.pr = sh4r.pc + 4;
|
nkeynes@359 | 770 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 771 | sh4r.new_pc = pc + 4 + sh4r.r[Rn];
|
nkeynes@359 | 772 | TRACE_CALL( pc, sh4r.new_pc );
|
nkeynes@359 | 773 | return TRUE;
|
nkeynes@359 | 774 | :}
|
nkeynes@359 | 775 | BT disp {:
|
nkeynes@359 | 776 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 777 | if( sh4r.t ) {
|
nkeynes@359 | 778 | CHECKDEST( sh4r.pc + disp + 4 )
|
nkeynes@359 | 779 | sh4r.pc += disp + 4;
|
nkeynes@359 | 780 | sh4r.new_pc = sh4r.pc + 2;
|
nkeynes@359 | 781 | return TRUE;
|
nkeynes@359 | 782 | }
|
nkeynes@359 | 783 | :}
|
nkeynes@359 | 784 | BF disp {:
|
nkeynes@359 | 785 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 786 | if( !sh4r.t ) {
|
nkeynes@359 | 787 | CHECKDEST( sh4r.pc + disp + 4 )
|
nkeynes@359 | 788 | sh4r.pc += disp + 4;
|
nkeynes@359 | 789 | sh4r.new_pc = sh4r.pc + 2;
|
nkeynes@359 | 790 | return TRUE;
|
nkeynes@359 | 791 | }
|
nkeynes@359 | 792 | :}
|
nkeynes@359 | 793 | BT/S disp {:
|
nkeynes@359 | 794 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 795 | if( sh4r.t ) {
|
nkeynes@359 | 796 | CHECKDEST( sh4r.pc + disp + 4 )
|
nkeynes@359 | 797 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 798 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 799 | sh4r.new_pc = pc + disp + 4;
|
nkeynes@359 | 800 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 801 | return TRUE;
|
nkeynes@359 | 802 | }
|
nkeynes@359 | 803 | :}
|
nkeynes@359 | 804 | BF/S disp {:
|
nkeynes@359 | 805 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 806 | if( !sh4r.t ) {
|
nkeynes@359 | 807 | CHECKDEST( sh4r.pc + disp + 4 )
|
nkeynes@359 | 808 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 809 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 810 | sh4r.new_pc = pc + disp + 4;
|
nkeynes@359 | 811 | return TRUE;
|
nkeynes@359 | 812 | }
|
nkeynes@359 | 813 | :}
|
nkeynes@359 | 814 | BRA disp {:
|
nkeynes@359 | 815 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 816 | CHECKDEST( sh4r.pc + disp + 4 );
|
nkeynes@359 | 817 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 818 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 819 | sh4r.new_pc = pc + 4 + disp;
|
nkeynes@359 | 820 | return TRUE;
|
nkeynes@359 | 821 | :}
|
nkeynes@359 | 822 | BSR disp {:
|
nkeynes@359 | 823 | CHECKDEST( sh4r.pc + disp + 4 );
|
nkeynes@359 | 824 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 825 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 826 | sh4r.pr = pc + 4;
|
nkeynes@359 | 827 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 828 | sh4r.new_pc = pc + 4 + disp;
|
nkeynes@359 | 829 | TRACE_CALL( pc, sh4r.new_pc );
|
nkeynes@359 | 830 | return TRUE;
|
nkeynes@359 | 831 | :}
|
nkeynes@359 | 832 | TRAPA #imm {:
|
nkeynes@359 | 833 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 834 | sh4r.pc += 2;
|
nkeynes@586 | 835 | sh4_raise_trap( imm );
|
nkeynes@586 | 836 | return TRUE;
|
nkeynes@359 | 837 | :}
|
nkeynes@359 | 838 | RTS {:
|
nkeynes@359 | 839 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 840 | CHECKDEST( sh4r.pr );
|
nkeynes@359 | 841 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 842 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 843 | sh4r.new_pc = sh4r.pr;
|
nkeynes@359 | 844 | TRACE_RETURN( pc, sh4r.new_pc );
|
nkeynes@359 | 845 | return TRUE;
|
nkeynes@359 | 846 | :}
|
nkeynes@359 | 847 | SLEEP {:
|
nkeynes@359 | 848 | if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
|
nkeynes@359 | 849 | sh4r.sh4_state = SH4_STATE_STANDBY;
|
nkeynes@359 | 850 | } else {
|
nkeynes@359 | 851 | sh4r.sh4_state = SH4_STATE_SLEEP;
|
nkeynes@359 | 852 | }
|
nkeynes@359 | 853 | return FALSE; /* Halt CPU */
|
nkeynes@359 | 854 | :}
|
nkeynes@359 | 855 | RTE {:
|
nkeynes@359 | 856 | CHECKPRIV();
|
nkeynes@359 | 857 | CHECKDEST( sh4r.spc );
|
nkeynes@359 | 858 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 859 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 860 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 861 | sh4r.new_pc = sh4r.spc;
|
nkeynes@374 | 862 | sh4_write_sr( sh4r.ssr );
|
nkeynes@359 | 863 | return TRUE;
|
nkeynes@359 | 864 | :}
|
nkeynes@359 | 865 | JMP @Rn {:
|
nkeynes@359 | 866 | CHECKDEST( sh4r.r[Rn] );
|
nkeynes@359 | 867 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 868 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 869 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 870 | sh4r.new_pc = sh4r.r[Rn];
|
nkeynes@359 | 871 | return TRUE;
|
nkeynes@359 | 872 | :}
|
nkeynes@359 | 873 | JSR @Rn {:
|
nkeynes@359 | 874 | CHECKDEST( sh4r.r[Rn] );
|
nkeynes@359 | 875 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 876 | sh4r.in_delay_slot = 1;
|
nkeynes@359 | 877 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 878 | sh4r.new_pc = sh4r.r[Rn];
|
nkeynes@359 | 879 | sh4r.pr = pc + 4;
|
nkeynes@359 | 880 | TRACE_CALL( pc, sh4r.new_pc );
|
nkeynes@359 | 881 | return TRUE;
|
nkeynes@359 | 882 | :}
|
nkeynes@359 | 883 | STS MACH, Rn {: sh4r.r[Rn] = (sh4r.mac>>32); :}
|
nkeynes@359 | 884 | STS.L MACH, @-Rn {:
|
nkeynes@587 | 885 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 886 | MEM_WRITE_LONG( sh4r.r[Rn]-4, (sh4r.mac>>32) );
|
nkeynes@359 | 887 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 888 | :}
|
nkeynes@359 | 889 | STC.L SR, @-Rn {:
|
nkeynes@359 | 890 | CHECKPRIV();
|
nkeynes@587 | 891 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 892 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4_read_sr() );
|
nkeynes@359 | 893 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 894 | :}
|
nkeynes@359 | 895 | LDS.L @Rm+, MACH {:
|
nkeynes@359 | 896 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 897 | MEM_READ_LONG(sh4r.r[Rm], tmp);
|
nkeynes@359 | 898 | sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
|
nkeynes@586 | 899 | (((uint64_t)tmp)<<32);
|
nkeynes@359 | 900 | sh4r.r[Rm] += 4;
|
nkeynes@359 | 901 | :}
|
nkeynes@359 | 902 | LDC.L @Rm+, SR {:
|
nkeynes@359 | 903 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 904 | CHECKPRIV();
|
nkeynes@359 | 905 | CHECKWALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 906 | MEM_READ_LONG(sh4r.r[Rm], tmp);
|
nkeynes@586 | 907 | sh4_write_sr( tmp );
|
nkeynes@359 | 908 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 909 | :}
|
nkeynes@359 | 910 | LDS Rm, MACH {:
|
nkeynes@359 | 911 | sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
|
nkeynes@359 | 912 | (((uint64_t)sh4r.r[Rm])<<32);
|
nkeynes@359 | 913 | :}
|
nkeynes@359 | 914 | LDC Rm, SR {:
|
nkeynes@359 | 915 | CHECKSLOTILLEGAL();
|
nkeynes@359 | 916 | CHECKPRIV();
|
nkeynes@374 | 917 | sh4_write_sr( sh4r.r[Rm] );
|
nkeynes@359 | 918 | :}
|
nkeynes@359 | 919 | LDC Rm, SGR {:
|
nkeynes@359 | 920 | CHECKPRIV();
|
nkeynes@359 | 921 | sh4r.sgr = sh4r.r[Rm];
|
nkeynes@359 | 922 | :}
|
nkeynes@359 | 923 | LDC.L @Rm+, SGR {:
|
nkeynes@359 | 924 | CHECKPRIV();
|
nkeynes@359 | 925 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 926 | MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
|
nkeynes@359 | 927 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 928 | :}
|
nkeynes@359 | 929 | STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
|
nkeynes@359 | 930 | STS.L MACL, @-Rn {:
|
nkeynes@587 | 931 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 932 | MEM_WRITE_LONG( sh4r.r[Rn]-4, (uint32_t)sh4r.mac );
|
nkeynes@359 | 933 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 934 | :}
|
nkeynes@359 | 935 | STC.L GBR, @-Rn {:
|
nkeynes@587 | 936 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 937 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.gbr );
|
nkeynes@359 | 938 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 939 | :}
|
nkeynes@359 | 940 | LDS.L @Rm+, MACL {:
|
nkeynes@359 | 941 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 942 | MEM_READ_LONG(sh4r.r[Rm], tmp);
|
nkeynes@359 | 943 | sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
|
nkeynes@586 | 944 | (uint64_t)((uint32_t)tmp);
|
nkeynes@359 | 945 | sh4r.r[Rm] += 4;
|
nkeynes@359 | 946 | :}
|
nkeynes@359 | 947 | LDC.L @Rm+, GBR {:
|
nkeynes@359 | 948 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 949 | MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
|
nkeynes@359 | 950 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 951 | :}
|
nkeynes@359 | 952 | LDS Rm, MACL {:
|
nkeynes@359 | 953 | sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
|
nkeynes@359 | 954 | (uint64_t)((uint32_t)(sh4r.r[Rm]));
|
nkeynes@359 | 955 | :}
|
nkeynes@359 | 956 | LDC Rm, GBR {: sh4r.gbr = sh4r.r[Rm]; :}
|
nkeynes@359 | 957 | STS PR, Rn {: sh4r.r[Rn] = sh4r.pr; :}
|
nkeynes@359 | 958 | STS.L PR, @-Rn {:
|
nkeynes@587 | 959 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 960 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.pr );
|
nkeynes@359 | 961 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 962 | :}
|
nkeynes@359 | 963 | STC.L VBR, @-Rn {:
|
nkeynes@359 | 964 | CHECKPRIV();
|
nkeynes@587 | 965 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 966 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.vbr );
|
nkeynes@359 | 967 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 968 | :}
|
nkeynes@359 | 969 | LDS.L @Rm+, PR {:
|
nkeynes@359 | 970 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 971 | MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
|
nkeynes@359 | 972 | sh4r.r[Rm] += 4;
|
nkeynes@359 | 973 | :}
|
nkeynes@359 | 974 | LDC.L @Rm+, VBR {:
|
nkeynes@359 | 975 | CHECKPRIV();
|
nkeynes@359 | 976 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 977 | MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
|
nkeynes@359 | 978 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 979 | :}
|
nkeynes@359 | 980 | LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
|
nkeynes@359 | 981 | LDC Rm, VBR {:
|
nkeynes@359 | 982 | CHECKPRIV();
|
nkeynes@359 | 983 | sh4r.vbr = sh4r.r[Rm];
|
nkeynes@359 | 984 | :}
|
nkeynes@359 | 985 | STC SGR, Rn {:
|
nkeynes@359 | 986 | CHECKPRIV();
|
nkeynes@359 | 987 | sh4r.r[Rn] = sh4r.sgr;
|
nkeynes@359 | 988 | :}
|
nkeynes@359 | 989 | STC.L SGR, @-Rn {:
|
nkeynes@359 | 990 | CHECKPRIV();
|
nkeynes@587 | 991 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 992 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.sgr );
|
nkeynes@359 | 993 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 994 | :}
|
nkeynes@359 | 995 | STC.L SSR, @-Rn {:
|
nkeynes@359 | 996 | CHECKPRIV();
|
nkeynes@587 | 997 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 998 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.ssr );
|
nkeynes@359 | 999 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1000 | :}
|
nkeynes@359 | 1001 | LDC.L @Rm+, SSR {:
|
nkeynes@359 | 1002 | CHECKPRIV();
|
nkeynes@359 | 1003 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 1004 | MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
|
nkeynes@359 | 1005 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 1006 | :}
|
nkeynes@359 | 1007 | LDC Rm, SSR {:
|
nkeynes@359 | 1008 | CHECKPRIV();
|
nkeynes@359 | 1009 | sh4r.ssr = sh4r.r[Rm];
|
nkeynes@359 | 1010 | :}
|
nkeynes@359 | 1011 | STC.L SPC, @-Rn {:
|
nkeynes@359 | 1012 | CHECKPRIV();
|
nkeynes@587 | 1013 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 1014 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.spc );
|
nkeynes@359 | 1015 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1016 | :}
|
nkeynes@359 | 1017 | LDC.L @Rm+, SPC {:
|
nkeynes@359 | 1018 | CHECKPRIV();
|
nkeynes@359 | 1019 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 1020 | MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
|
nkeynes@359 | 1021 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 1022 | :}
|
nkeynes@359 | 1023 | LDC Rm, SPC {:
|
nkeynes@359 | 1024 | CHECKPRIV();
|
nkeynes@359 | 1025 | sh4r.spc = sh4r.r[Rm];
|
nkeynes@359 | 1026 | :}
|
nkeynes@626 | 1027 | STS FPUL, Rn {:
|
nkeynes@626 | 1028 | CHECKFPUEN();
|
nkeynes@669 | 1029 | sh4r.r[Rn] = FPULi;
|
nkeynes@626 | 1030 | :}
|
nkeynes@359 | 1031 | STS.L FPUL, @-Rn {:
|
nkeynes@626 | 1032 | CHECKFPUEN();
|
nkeynes@587 | 1033 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@669 | 1034 | MEM_WRITE_LONG( sh4r.r[Rn]-4, FPULi );
|
nkeynes@359 | 1035 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1036 | :}
|
nkeynes@359 | 1037 | LDS.L @Rm+, FPUL {:
|
nkeynes@626 | 1038 | CHECKFPUEN();
|
nkeynes@359 | 1039 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@669 | 1040 | MEM_READ_LONG(sh4r.r[Rm], FPULi);
|
nkeynes@359 | 1041 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 1042 | :}
|
nkeynes@626 | 1043 | LDS Rm, FPUL {:
|
nkeynes@626 | 1044 | CHECKFPUEN();
|
nkeynes@669 | 1045 | FPULi = sh4r.r[Rm];
|
nkeynes@626 | 1046 | :}
|
nkeynes@626 | 1047 | STS FPSCR, Rn {:
|
nkeynes@626 | 1048 | CHECKFPUEN();
|
nkeynes@626 | 1049 | sh4r.r[Rn] = sh4r.fpscr;
|
nkeynes@626 | 1050 | :}
|
nkeynes@359 | 1051 | STS.L FPSCR, @-Rn {:
|
nkeynes@626 | 1052 | CHECKFPUEN();
|
nkeynes@587 | 1053 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 1054 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.fpscr );
|
nkeynes@359 | 1055 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1056 | :}
|
nkeynes@359 | 1057 | LDS.L @Rm+, FPSCR {:
|
nkeynes@626 | 1058 | CHECKFPUEN();
|
nkeynes@359 | 1059 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@669 | 1060 | MEM_READ_LONG(sh4r.r[Rm], tmp);
|
nkeynes@359 | 1061 | sh4r.r[Rm] +=4;
|
nkeynes@669 | 1062 | sh4_write_fpscr( tmp );
|
nkeynes@359 | 1063 | :}
|
nkeynes@374 | 1064 | LDS Rm, FPSCR {:
|
nkeynes@626 | 1065 | CHECKFPUEN();
|
nkeynes@669 | 1066 | sh4_write_fpscr( sh4r.r[Rm] );
|
nkeynes@374 | 1067 | :}
|
nkeynes@359 | 1068 | STC DBR, Rn {: CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr; :}
|
nkeynes@359 | 1069 | STC.L DBR, @-Rn {:
|
nkeynes@359 | 1070 | CHECKPRIV();
|
nkeynes@587 | 1071 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 1072 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.dbr );
|
nkeynes@359 | 1073 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1074 | :}
|
nkeynes@359 | 1075 | LDC.L @Rm+, DBR {:
|
nkeynes@359 | 1076 | CHECKPRIV();
|
nkeynes@359 | 1077 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 1078 | MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
|
nkeynes@359 | 1079 | sh4r.r[Rm] +=4;
|
nkeynes@359 | 1080 | :}
|
nkeynes@359 | 1081 | LDC Rm, DBR {:
|
nkeynes@359 | 1082 | CHECKPRIV();
|
nkeynes@359 | 1083 | sh4r.dbr = sh4r.r[Rm];
|
nkeynes@359 | 1084 | :}
|
nkeynes@359 | 1085 | STC.L Rm_BANK, @-Rn {:
|
nkeynes@359 | 1086 | CHECKPRIV();
|
nkeynes@587 | 1087 | CHECKWALIGN32( sh4r.r[Rn] );
|
nkeynes@587 | 1088 | MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r_bank[Rm_BANK] );
|
nkeynes@359 | 1089 | sh4r.r[Rn] -= 4;
|
nkeynes@359 | 1090 | :}
|
nkeynes@359 | 1091 | LDC.L @Rm+, Rn_BANK {:
|
nkeynes@359 | 1092 | CHECKPRIV();
|
nkeynes@359 | 1093 | CHECKRALIGN32( sh4r.r[Rm] );
|
nkeynes@586 | 1094 | MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
|
nkeynes@359 | 1095 | sh4r.r[Rm] += 4;
|
nkeynes@359 | 1096 | :}
|
nkeynes@359 | 1097 | LDC Rm, Rn_BANK {:
|
nkeynes@359 | 1098 | CHECKPRIV();
|
nkeynes@359 | 1099 | sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
|
nkeynes@359 | 1100 | :}
|
nkeynes@359 | 1101 | STC SR, Rn {:
|
nkeynes@359 | 1102 | CHECKPRIV();
|
nkeynes@359 | 1103 | sh4r.r[Rn] = sh4_read_sr();
|
nkeynes@359 | 1104 | :}
|
nkeynes@359 | 1105 | STC GBR, Rn {:
|
nkeynes@359 | 1106 | sh4r.r[Rn] = sh4r.gbr;
|
nkeynes@359 | 1107 | :}
|
nkeynes@359 | 1108 | STC VBR, Rn {:
|
nkeynes@359 | 1109 | CHECKPRIV();
|
nkeynes@359 | 1110 | sh4r.r[Rn] = sh4r.vbr;
|
nkeynes@359 | 1111 | :}
|
nkeynes@359 | 1112 | STC SSR, Rn {:
|
nkeynes@359 | 1113 | CHECKPRIV();
|
nkeynes@359 | 1114 | sh4r.r[Rn] = sh4r.ssr;
|
nkeynes@359 | 1115 | :}
|
nkeynes@359 | 1116 | STC SPC, Rn {:
|
nkeynes@359 | 1117 | CHECKPRIV();
|
nkeynes@359 | 1118 | sh4r.r[Rn] = sh4r.spc;
|
nkeynes@359 | 1119 | :}
|
nkeynes@359 | 1120 | STC Rm_BANK, Rn {:
|
nkeynes@359 | 1121 | CHECKPRIV();
|
nkeynes@359 | 1122 | sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
|
nkeynes@359 | 1123 | :}
|
nkeynes@359 | 1124 |
|
nkeynes@359 | 1125 | FADD FRm, FRn {:
|
nkeynes@359 | 1126 | CHECKFPUEN();
|
nkeynes@359 | 1127 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1128 | DR(FRn) += DR(FRm);
|
nkeynes@359 | 1129 | } else {
|
nkeynes@359 | 1130 | FR(FRn) += FR(FRm);
|
nkeynes@359 | 1131 | }
|
nkeynes@359 | 1132 | :}
|
nkeynes@359 | 1133 | FSUB FRm, FRn {:
|
nkeynes@359 | 1134 | CHECKFPUEN();
|
nkeynes@359 | 1135 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1136 | DR(FRn) -= DR(FRm);
|
nkeynes@359 | 1137 | } else {
|
nkeynes@359 | 1138 | FR(FRn) -= FR(FRm);
|
nkeynes@359 | 1139 | }
|
nkeynes@359 | 1140 | :}
|
nkeynes@359 | 1141 |
|
nkeynes@359 | 1142 | FMUL FRm, FRn {:
|
nkeynes@359 | 1143 | CHECKFPUEN();
|
nkeynes@359 | 1144 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1145 | DR(FRn) *= DR(FRm);
|
nkeynes@359 | 1146 | } else {
|
nkeynes@359 | 1147 | FR(FRn) *= FR(FRm);
|
nkeynes@359 | 1148 | }
|
nkeynes@359 | 1149 | :}
|
nkeynes@359 | 1150 |
|
nkeynes@359 | 1151 | FDIV FRm, FRn {:
|
nkeynes@359 | 1152 | CHECKFPUEN();
|
nkeynes@359 | 1153 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1154 | DR(FRn) /= DR(FRm);
|
nkeynes@359 | 1155 | } else {
|
nkeynes@359 | 1156 | FR(FRn) /= FR(FRm);
|
nkeynes@359 | 1157 | }
|
nkeynes@359 | 1158 | :}
|
nkeynes@359 | 1159 |
|
nkeynes@359 | 1160 | FCMP/EQ FRm, FRn {:
|
nkeynes@359 | 1161 | CHECKFPUEN();
|
nkeynes@359 | 1162 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1163 | sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
|
nkeynes@359 | 1164 | } else {
|
nkeynes@359 | 1165 | sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
|
nkeynes@359 | 1166 | }
|
nkeynes@359 | 1167 | :}
|
nkeynes@359 | 1168 |
|
nkeynes@359 | 1169 | FCMP/GT FRm, FRn {:
|
nkeynes@359 | 1170 | CHECKFPUEN();
|
nkeynes@359 | 1171 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1172 | sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
|
nkeynes@359 | 1173 | } else {
|
nkeynes@359 | 1174 | sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
|
nkeynes@359 | 1175 | }
|
nkeynes@359 | 1176 | :}
|
nkeynes@359 | 1177 |
|
nkeynes@359 | 1178 | FSTS FPUL, FRn {: CHECKFPUEN(); FR(FRn) = FPULf; :}
|
nkeynes@359 | 1179 | FLDS FRm, FPUL {: CHECKFPUEN(); FPULf = FR(FRm); :}
|
nkeynes@359 | 1180 | FLOAT FPUL, FRn {:
|
nkeynes@359 | 1181 | CHECKFPUEN();
|
nkeynes@374 | 1182 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@374 | 1183 | if( FRn&1 ) { // No, really...
|
nkeynes@374 | 1184 | dtmp = (double)FPULi;
|
nkeynes@374 | 1185 | FR(FRn) = *(((float *)&dtmp)+1);
|
nkeynes@374 | 1186 | } else {
|
nkeynes@374 | 1187 | DRF(FRn>>1) = (double)FPULi;
|
nkeynes@374 | 1188 | }
|
nkeynes@374 | 1189 | } else {
|
nkeynes@359 | 1190 | FR(FRn) = (float)FPULi;
|
nkeynes@374 | 1191 | }
|
nkeynes@359 | 1192 | :}
|
nkeynes@359 | 1193 | FTRC FRm, FPUL {:
|
nkeynes@359 | 1194 | CHECKFPUEN();
|
nkeynes@359 | 1195 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@374 | 1196 | if( FRm&1 ) {
|
nkeynes@374 | 1197 | dtmp = 0;
|
nkeynes@374 | 1198 | *(((float *)&dtmp)+1) = FR(FRm);
|
nkeynes@374 | 1199 | } else {
|
nkeynes@374 | 1200 | dtmp = DRF(FRm>>1);
|
nkeynes@374 | 1201 | }
|
nkeynes@359 | 1202 | if( dtmp >= MAX_INTF )
|
nkeynes@359 | 1203 | FPULi = MAX_INT;
|
nkeynes@359 | 1204 | else if( dtmp <= MIN_INTF )
|
nkeynes@359 | 1205 | FPULi = MIN_INT;
|
nkeynes@359 | 1206 | else
|
nkeynes@359 | 1207 | FPULi = (int32_t)dtmp;
|
nkeynes@359 | 1208 | } else {
|
nkeynes@359 | 1209 | ftmp = FR(FRm);
|
nkeynes@359 | 1210 | if( ftmp >= MAX_INTF )
|
nkeynes@359 | 1211 | FPULi = MAX_INT;
|
nkeynes@359 | 1212 | else if( ftmp <= MIN_INTF )
|
nkeynes@359 | 1213 | FPULi = MIN_INT;
|
nkeynes@359 | 1214 | else
|
nkeynes@359 | 1215 | FPULi = (int32_t)ftmp;
|
nkeynes@359 | 1216 | }
|
nkeynes@359 | 1217 | :}
|
nkeynes@359 | 1218 | FNEG FRn {:
|
nkeynes@359 | 1219 | CHECKFPUEN();
|
nkeynes@359 | 1220 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1221 | DR(FRn) = -DR(FRn);
|
nkeynes@359 | 1222 | } else {
|
nkeynes@359 | 1223 | FR(FRn) = -FR(FRn);
|
nkeynes@359 | 1224 | }
|
nkeynes@359 | 1225 | :}
|
nkeynes@359 | 1226 | FABS FRn {:
|
nkeynes@359 | 1227 | CHECKFPUEN();
|
nkeynes@359 | 1228 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1229 | DR(FRn) = fabs(DR(FRn));
|
nkeynes@359 | 1230 | } else {
|
nkeynes@359 | 1231 | FR(FRn) = fabsf(FR(FRn));
|
nkeynes@359 | 1232 | }
|
nkeynes@359 | 1233 | :}
|
nkeynes@359 | 1234 | FSQRT FRn {:
|
nkeynes@359 | 1235 | CHECKFPUEN();
|
nkeynes@359 | 1236 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1237 | DR(FRn) = sqrt(DR(FRn));
|
nkeynes@359 | 1238 | } else {
|
nkeynes@359 | 1239 | FR(FRn) = sqrtf(FR(FRn));
|
nkeynes@359 | 1240 | }
|
nkeynes@359 | 1241 | :}
|
nkeynes@359 | 1242 | FLDI0 FRn {:
|
nkeynes@359 | 1243 | CHECKFPUEN();
|
nkeynes@359 | 1244 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1245 | DR(FRn) = 0.0;
|
nkeynes@359 | 1246 | } else {
|
nkeynes@359 | 1247 | FR(FRn) = 0.0;
|
nkeynes@359 | 1248 | }
|
nkeynes@359 | 1249 | :}
|
nkeynes@359 | 1250 | FLDI1 FRn {:
|
nkeynes@359 | 1251 | CHECKFPUEN();
|
nkeynes@359 | 1252 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1253 | DR(FRn) = 1.0;
|
nkeynes@359 | 1254 | } else {
|
nkeynes@359 | 1255 | FR(FRn) = 1.0;
|
nkeynes@359 | 1256 | }
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nkeynes@359 | 1257 | :}
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nkeynes@359 | 1258 | FMAC FR0, FRm, FRn {:
|
nkeynes@359 | 1259 | CHECKFPUEN();
|
nkeynes@359 | 1260 | if( IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1261 | DR(FRn) += DR(FRm)*DR(0);
|
nkeynes@359 | 1262 | } else {
|
nkeynes@359 | 1263 | FR(FRn) += FR(FRm)*FR(0);
|
nkeynes@359 | 1264 | }
|
nkeynes@359 | 1265 | :}
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nkeynes@374 | 1266 | FRCHG {:
|
nkeynes@374 | 1267 | CHECKFPUEN();
|
nkeynes@374 | 1268 | sh4r.fpscr ^= FPSCR_FR;
|
nkeynes@669 | 1269 | sh4_switch_fr_banks();
|
nkeynes@374 | 1270 | :}
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nkeynes@359 | 1271 | FSCHG {: CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ; :}
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nkeynes@359 | 1272 | FCNVSD FPUL, FRn {:
|
nkeynes@359 | 1273 | CHECKFPUEN();
|
nkeynes@359 | 1274 | if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
|
nkeynes@359 | 1275 | DR(FRn) = (double)FPULf;
|
nkeynes@359 | 1276 | }
|
nkeynes@359 | 1277 | :}
|
nkeynes@359 | 1278 | FCNVDS FRm, FPUL {:
|
nkeynes@359 | 1279 | CHECKFPUEN();
|
nkeynes@359 | 1280 | if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
|
nkeynes@359 | 1281 | FPULf = (float)DR(FRm);
|
nkeynes@359 | 1282 | }
|
nkeynes@359 | 1283 | :}
|
nkeynes@359 | 1284 |
|
nkeynes@359 | 1285 | FSRRA FRn {:
|
nkeynes@359 | 1286 | CHECKFPUEN();
|
nkeynes@359 | 1287 | if( !IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1288 | FR(FRn) = 1.0/sqrtf(FR(FRn));
|
nkeynes@359 | 1289 | }
|
nkeynes@359 | 1290 | :}
|
nkeynes@359 | 1291 | FIPR FVm, FVn {:
|
nkeynes@359 | 1292 | CHECKFPUEN();
|
nkeynes@359 | 1293 | if( !IS_FPU_DOUBLEPREC() ) {
|
nkeynes@359 | 1294 | int tmp2 = FVn<<2;
|
nkeynes@359 | 1295 | tmp = FVm<<2;
|
nkeynes@359 | 1296 | FR(tmp2+3) = FR(tmp)*FR(tmp2) +
|
nkeynes@359 | 1297 | FR(tmp+1)*FR(tmp2+1) +
|
nkeynes@359 | 1298 | FR(tmp+2)*FR(tmp2+2) +
|
nkeynes@359 | 1299 | FR(tmp+3)*FR(tmp2+3);
|
nkeynes@359 | 1300 | }
|
nkeynes@359 | 1301 | :}
|
nkeynes@359 | 1302 | FSCA FPUL, FRn {:
|
nkeynes@359 | 1303 | CHECKFPUEN();
|
nkeynes@359 | 1304 | if( !IS_FPU_DOUBLEPREC() ) {
|
nkeynes@758 | 1305 | sh4_fsca( FPULi, (float *)&(DRF(FRn>>1)) );
|
nkeynes@359 | 1306 | }
|
nkeynes@359 | 1307 | :}
|
nkeynes@359 | 1308 | FTRV XMTRX, FVn {:
|
nkeynes@359 | 1309 | CHECKFPUEN();
|
nkeynes@359 | 1310 | if( !IS_FPU_DOUBLEPREC() ) {
|
nkeynes@758 | 1311 | sh4_ftrv((float *)&(DRF(FVn<<1)) );
|
nkeynes@359 | 1312 | }
|
nkeynes@359 | 1313 | :}
|
nkeynes@359 | 1314 | UNDEF {:
|
nkeynes@359 | 1315 | UNDEF(ir);
|
nkeynes@359 | 1316 | :}
|
nkeynes@359 | 1317 | %%
|
nkeynes@359 | 1318 | sh4r.pc = sh4r.new_pc;
|
nkeynes@359 | 1319 | sh4r.new_pc += 2;
|
nkeynes@927 | 1320 |
|
nkeynes@927 | 1321 | except:
|
nkeynes@359 | 1322 | sh4r.in_delay_slot = 0;
|
nkeynes@359 | 1323 | return TRUE;
|
nkeynes@359 | 1324 | }
|