Fix mask correctness of MMU/general IO registers, add unknown/undoced
register at FF00002C
src/sh4/mmu.c
src/sh4/sh4mmio.h
test/testregs.c
register at FF00002C
src/sh4/mmu.c
src/sh4/sh4mmio.h
test/testregs.c
Silence file load warnings when running the test cases (trying to load empty filenames)
src/dreamcast.c
src/loader.c
src/mem.c
src/dreamcast.c
src/loader.c
src/mem.c
Correct generated UNDEF() => UNDEF(ir) for consistency with UNIMP(ir)
src/sh4/sh4stat.in
src/sh4/sh4x86.in
src/tools/gendec.c
src/sh4/sh4stat.in
src/sh4/sh4x86.in
src/tools/gendec.c
Mask fpscr correctly as well while we're in there
src/sh4/sh4.c
src/sh4/sh4core.h
test/Makefile.in
test/sh4/ldc.s
test/sh4/ldcsr.s
test/sh4/testsh4.c
src/sh4/sh4.c
src/sh4/sh4core.h
test/Makefile.in
test/sh4/ldc.s
test/sh4/ldcsr.s
test/sh4/testsh4.c
Mask off SR correctly when writing to it - this turns out to be important
in some cases
src/sh4/sh4.c
test/Makefile.in
test/sh4/ldcsr.s
test/sh4/testsh4.c
in some cases
src/sh4/sh4.c
test/Makefile.in
test/sh4/ldcsr.s
test/sh4/testsh4.c
Setup the interrupt/exception vectors properly in the arm crt0
Use fully guarded memcpy_to_aica for program transfer
test/lib-arm/crt0.s
test/testaica.c
Use fully guarded memcpy_to_aica for program transfer
test/lib-arm/crt0.s
test/testaica.c
Add semi-documented PVR register at 0xFF000030 (SH4 version identification)
src/sh4/mmu.c
src/sh4/sh4mmio.h
test/testregs.c
src/sh4/mmu.c
src/sh4/sh4mmio.h
test/testregs.c
.